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1256E User Manual
Racal Instruments
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2002 SCPI Command Basics 5-15
*ESE? Query
This query reads the value presently programmed for the Standard
Event Status Enable Register . This reads the value as
programmed by the “*ESE” command.
*ESR? Query
This query reads the value of the Standard Event Status Register .
Each bit of this register indicates a true/false status condition.
When the bit is set, the condition is TRUE; when the bit is cleared,
the condition is FALSE. The bit assignments are defined by the
IEEE-488.2 specification. The bit assignments are described in the
text following Figure 5-1.
The bits of the Standard Event Status Register are cleared at
power-on, except for bit 7, which is set. As conditions become true,
the corresponding bit in the register are set. These bits remain set
until:
•
The *ESR? query is executed
•
The *CLS command is executed
The reply to the *ESR? query is a numeric integer value in the
range “0" to “255".
*SRE Command
The *SRE command sets the value of Service Request Enable
Register . The value of this register is logically ANDed with the
contents of the Status Byte. If any bits of this AND operation are
set, bit 6 of the Status Byte is set. Bit 6 is also known as the
Master Status Summary bit. Consult the text immediately following
Figure 5-1 for a description of the MSS bit and the Service
Request Enable register.
The command has the format:
*SRE <SRE value>
where the “<SRE value>” is an integer numeric value in the range
0 to 255. The value of bit 6 of this register is ignored, since it does
not make sense to enable an interrupt when an interrupt is
generated.
*SRE? Query
This query reads the value presently programmed for the Service
Request Enable Register . This reads the value as programmed by
the *SRE command. The reply to this command is a numeric value
in the range 0 to 255.