CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
Preliminary User’s Manual U17260EJ3V1UD
391
Figure 16-6. Format of Serial Clock Selection Register 11 (CSIC11)
Address: FF89H After reset: 00H R/W
Symbol
7 6 5 4 3 2 1 0
CSIC11
0
0
0
CKP11 DAP11 CKS112 CKS111 CKS110
CKP11
DAP11
Specification of data transmission/reception timing
Type
0
0
D7
D6
D5
D4
D3
D2
D1
D0
SCK11
SO11
SI11 input timing
1
0
1
D7
D6
D5
D4
D3
D2
D1
D0
SCK11
SO11
SI11 input timing
2
1
0
D7
D6
D5
D4
D3
D2
D1
D0
SCK11
SO11
SI11 input timing
3
1
1
D7
D6
D5
D4
D3
D2
D1
D0
SCK11
SO11
SI11 input timing
4
CSI11 serial clock selection
CKS112
CKS111
CKS110
f
PRS
=
2 MHz
f
PRS
=
5 MHz
f
PRS
=
10 MHz
f
PRS
=
20 MHz
Mode
0
0
0
f
PRS
/2
1 MHz
2.5 MHz
5 MHz
10 MHz
0
0
1
f
PRS
/2
2
500 kHz
1.25 MHz 2.5 MHz
5 MHz
0
1
0
f
PRS
/2
3
250 kHz
625 kHz
1.25 MHz 2.5 MHz
0
1
1
f
PRS
/2
4
125
kHz 312.5 kHz 625 kHz
1.25 MHz
1
0
0
f
PRS
/2
5
62.5
kHz 156.25
kHz 312.5
kHz 625 kHz
1
0
1
f
PRS
/2
6
31.25 kHz 78.13 kHz 156.25 kHz 312.5 kHz
1
1
0
f
PRS
/2
7
15.63 kHz 39.06 kHz 78.13 kHz 156.25 kHz
Master mode
1
1
1
External clock input to SCK11
Slave mode
Cautions 1. Do not write to CSIC11 while CSIE11 = 1 (operation enabled).
2. To use P02/SO11 and P04/SCK11 as general-purpose ports, set CSIC11 in the default status
(00H).
3. The phase type of the data clock is type 1 after reset.
Remark
f
PRS
: Peripheral hardware clock frequency
Содержание 78K/0 Series
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