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ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 5 Interrupts (INTs)
5 – 23
5.3.5 Interrupt Disable State
Even if the interrupt conditions are satisfied, an interrupt may not be accepted depending on the operating state. This is
called an interrupt disabled state. See below for the interrupt disabled state and the handling of interrupts in this state.
Interrupt disabled state 1:
Between the interrupt shift cycle and the instruction at the beginning of the interrupt routine
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately following the
execution of the instruction at the beginning of the interrupt routine corresponding to the interrupt that has already
been enabled.
Interrupt disabled state 2:
Between the DSR prefix instruction and the next instruction
When the interrupt conditions are satisfied in this section, an interrupt is generated immediately after execution of
the instruction following the DSR prefix instruction.
Reference:
For the DSR prefix instruction, see “nX-U8/100 Core Instruction Manual”.