LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 167 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 11 PWM
11 – 7
11.2.6 PWM0 Control Register 1 (PW0CON1)
7 6 5 4 3 2 1 0
PW0CON1 P0STAT P0FLG
    
P0RUN
R/W R R/W R/W R/W R/W R/W R/W R/W
At reset 0 1 0 0 0 0 0 0
Address: 0F0A7H
Access: R/W
Access size: 8 bits
Initial value: 40H
PW0CON1 is a special function register (SFR) to control PWM0.
[Description of Bits]
•
P0RUN (bit 0)
The P0RUN bit is used to control count stop/start of PWM0.
P0RUN Description
0 Stops counting. (Initial value)
1
Starts counting.
•
P0FLG (bit 6)
The P0FLG bit is used to read the output flag of PWM0.
This bit is set to “1” when write operation to PW0CH or PW0CL is performed,
P0FLG Description
0 PWM0 output flag = “0”
1
PWM0 output flag = “1” (initial value)
•
P0STAT (bit 7)
The P0STAT bit indicates “counting stopped or “counting in progress” of PWM0.
P0STAT Description
0 Counting stopped. (Initial value)
1 Counting in progress.