LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 263 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 20 Port 3
20 – 4
20.2.2 Port 3 data register (P3D)
Address: 0F218H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
P3D
 
P35D P34D P33D P32D P31D P30D
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
P3D is a special function register (SFR) to set the value to be output to the Port 3 pin or to read the input level of the
Port 3. In output mode, the value of this register is output to the Port 3 pin. The value written to P3D is readable.
In input mode, the input level of the Port 3 pin is read when P3D is read. Output mode or input mode is selected by
using the port direction register (P3DIR) described later.
[Description of Bits]
•
P35D-P30D (bits 5-0)
The P35D to P30D bits are used to set the output value of the Port 3 pin in output mode and to read the pin level of
the Port 3 pin in input mode.
P35D Description
0 Output or input level of the P35 pin: ”L”
1 Output or input level of the P35 pin: ”H”
P34D Description
0 Output or input level of the P34 pin: ”L”
1 Output or input level of the P34 pin: ”H”
P33D Description
0 Output or input level of the P33 pin: ”L”
1 Output or input level of the P33 pin: ”H”
P32D Description
0 Output or input level of the P32 pin: ”L”
1 Output or input level of the P32 pin: ”H”
P31D Description
0 Output or input level of the P31 pin: ”L”
1 Output or input level of the P31 pin: ”H”
P30D Description
0 Output or input level of the P30 pin: ”L”
1 Output or input level of the P30 pin: ”H”