LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 104 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 6 Clock Generation Circuit
6 – 11
6.3.2.5 Operation of High-Speed Clock Generation Circuit
The high-speed clock generation circuit is activated in 500Hz RC oscillation mode by power-on reset generation.
As a result of the occurrence of power-on reset, the circuit goes into system reset mode and then shifts to program
operating mode after the elapse of the high-speed RC oscillation start time (T
RC
) and the oscillation stabilization time
(Count: 8192) of the high-speed oscillation clock (OSCLK) and at the same time, a high-speed clock (HSCLK) is
supplied to the peripheral circuits.
Figure 6-8 shows the waveforms of the high-speed clock generation circuit at power on. For the high-speed RC
oscillation start time (T
RC
), see Appendix C, “Electrical Characteristics”.
Figure 6-8 Operation of High-Speed Clock Generation Circuit at Power-On
The high-speed clock generation circuit allows selection of an oscillation mode and start/stop of oscillation by using the
frequency control registers 0 and 1 (FCON0 and FCON1).
Oscillation can be started by setting the ENOSC bit to “1” after selecting a high-speed oscillation mode in FCON0 and a
high-speed oscillation frequency. After the start of oscillation, HSCLK starts supply of a clock to the peripheral
circuits following the elapse of the high-speed oscillation start period (T
RC
/T
XTH
/T
PLL
) in each mode and the oscillation
stabilization period of the high-speed oscillation clock (OSCLK).
The high-speed clock generation circuit stops oscillation when it shifts to a STOP mode by the software. When the
STOP mode is released by external interrupt, HSCLK supplies clocks to peripheral circuits following the elapse of the
high-speed oscillation start period (T
RC
/T
XTH
/T
PLL
) in each mode and the oscillation stabilization period of the
high-speed clock (OSCLK). The oscillation stabilization period is the duration of 128 clock pulses in 500 kHz RC
oscillation mode and external clock input mode and the duration of 4096 clock pulses in the crystal/ceramic oscillation
mode and PLL oscillation mode.
High-speed oscillation
Count: 8192
CPU start
High-speed oscillation clock waveform
T
RC
: Oscillation start time
Power supply V
DD
RESET
High-speed oscillation
clock waveform
System clock
SYSCLK
SYSCLK waveform
HSCLK waveform
High-speed clock
HSCLK