LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 200 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 14 UART
14 – 5
14.2.4 UART0 Mode Register 0 (UA0MOD0)
Address: 0F292H
Access: R/W
Access size: 8/16 bits
Initial value: 00H
7 6 5 4 3 2 1 0
UA0MOD0 — — — U0RSEL — U0CK1 U0CK0 U0IO
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
UA0MOD0 is a special function register (SFR) to set the transfer mode of the UART.
[Description of Bits]
•
U0IO (bit 0)
The U0IO bit is used to select transmit or receive mode.
U0IO Description
0 Transmit mode (initial value)
1 Receive mode
•
U0CK1, U0CK0 (bits 2, 1)
The U0CK1 and U0CK0 bits are used to select the clock to be input to the baud rate generator of the UART0.
U0CK1 U0CK0 Description
0 0 LSCLK (initial value)
0 1 LSCLK
×
2
1 * HSCLK
•
U0RSEL (bit 4)
The U0RSEL bit is used to select the receive data input pin for the UART0.
U0RSEL Description
0 Selects the P02 pin. (Initial value)
1 Selects the P42 pin.
Notes:
- Always set the UA0MOD0 register while communication is stopped, and do not rewrite it during communication.
- When specifying LSCLK
×
2 for the clock, enable the operation of the 2
×
low-speed clock by setting bit 2 (ENMLT)
of the frequency control register 1 (FCON1) to “1”.
- When selecting the P42 pin as the receive data input pin, it is necessary to configure settings for the Port 4 secondary
functions. For the details of the Port 4 secondary function settings, see Chapter 21, “Port 4”.