LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 187 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 13 Synchronous Serial Port
13 – 7
13.2.5 Serial Port Mode Register 1 (SIO0MOD1)
Address: 0F285H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
SIO0MOD1
  
S0CKT

S0CK2 S0CK1 S0CK0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
SIO0MOD1 is a special function register (SFR) to set mode of the synchronous serial port.
[Description of Bits]
•
S0CK2 to S0CK0 (bits 2 to 0)
The S0CK2 to S0CK0 bits are used to select the transfer clock of the synchronous serial port. When the internal clock
is selected, this LSI is set to master mode and when the external clock is selected, it is set to slave mode.
S0CK2 S0CK1 S0CK0 Description
0 0 0 32 KHz (initial value)
0 0 1 16 KHz
0 1 0 1/4 HSCLK
0 1 1 1/8 HSCLK
1 0 0
1/16 HSCLK
1 0 1 1/32 HSCLK
1 1 0
External clock 0 (P41/SCK0)
1 1 1 External clock 1 (P45/SCK0)
•
S0CKT (bit 4)
The S0CKT bit is used to select a tansfer clock output phase.
S0CKT Description
0 Clock type 0: Clock is output with a “H” level being the default. (Initial value)
1 Clock type 1: Clock is output with a “L” level being the default.