
ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 15 I
2
C Bus Interface
15 – 6
15.2.5 I
2
C Bus 0 Control Register (I2C0CON)
Address: 0F2A3H
Access: R/W
Access size: 8 bits
Initial value: 00H
7
6
5
4
3
2
1
0
I2C0CON
I20ACT
—
—
—
—
I20RS
I20SP
I20ST
R/W
R/W
R/W
R/W
R/W
R/W
W
W
R/W
Initial value
0
0
0
0
0
0
0
0
I2C0CON is a special function register (SFR) to control transmit and receive operations.
[Description of Bits]
•
I20ST
(bit 0)
The I20ST bit is used to control the communication operation of the I
2
C bus interface. When the I20ST bit is set to
“1”, communication starts. When “1” is overwritten to the I20ST bit in a control register setting wait state after
transmission/reception of acknowledgment, communication starts again. When the I20ST bit is set to “0”,
communication is stopped forcibly.
The I20ST bit can be set to “1” only when the I2C bus interface is in an operation enable state (I20EN = “1”).
When the I20SP bit is set to “1”, the I20ST bit is set to “0”.
I20ST
Description
0
Stops communication (initial value)
1
Starts communication
•
I20SP
(bit 1)
The I20SP bit is a write-only bit used to request a stop condition. When the I20SP bit is set to “1”, the I
2
C bus
shifts to the stop condition and communication stops. When the I20SP bit is read, “0” is always read.
I20SP
Description
0
No stop condition request (initial value)
1
Stop condition request
•
I20RS
(bit 2)
The I20RS bit is a write-only bit used to request a repeated start. When this bit is set to “1” during data
communication, the I
2
C bus shifts to the repeated start condition and communication restarts from the slave address.
I20RS can be set to “1” only while communication is active (I20ST =“1”). When the I20RS bit is read, “0” is
always read.
I20RS
Description
0
No repeated start request (initial value)
1
Repeated start request
•
I20ACT
(bit 7)
The I20ACT bit is used to set the acknowledge signal to be output at completion of reception.
I20ACT
Description
0
Acknowledgment data “0” (initial value)
1
Acknowledgment data “1”
Содержание ML610421
Страница 1: ...ML610Q421 ML610Q422 ML610421 User s Manual Issue Date Feb 9 2015 FEUL610Q421 06...
Страница 15: ...Chapter 1 Overview...
Страница 44: ...Chapter 2 CPU and Memory Space...
Страница 49: ...Chapter 3 Reset Function...
Страница 53: ...Chapter 4 MCU Control Function...
Страница 69: ...Chapter 5 Interrupts INTs...
Страница 93: ...Chapter 6 Clock Generation Circuit...
Страница 110: ...Chapter 7 Time Base Counter...
Страница 121: ...Chapter 8 Capture...
Страница 129: ...Chapter 9 1 kHz Timer 1kHzTM...
Страница 135: ...Chapter 10 Timers...
Страница 160: ...Chapter 11 PWM...
Страница 172: ...Chapter 12 Watchdog Timer...
Страница 180: ...Chapter 13 Synchronous Serial Port...
Страница 195: ...Chapter 14 UART...
Страница 216: ...Chapter 15 I2 C Bus Interface...
Страница 231: ...Chapter 16 NMI Pin...
Страница 237: ...Chapter 17 Port 0...
Страница 246: ...Chapter 18 Port 1...
Страница 252: ...Chapter 19 Port 2...
Страница 259: ...Chapter 20 Port 3...
Страница 270: ...Chapter 21 Port 4...
Страница 282: ...Chapter 22 Port A...
Страница 290: ...Chapter 23 Melody Driver...
Страница 304: ...Chapter 24 RC Oscillation Type A D Converter...
Страница 327: ...Chapter 25 Successive Approximation Type A D Converter...
Страница 338: ...Chapter 26 LCD Drivers...
Страница 371: ...Chapter 27 Battery Level Detector...
Страница 378: ...Chapter 28 Power Supply Circuit...
Страница 381: ...Chapter 29 On Chip Debug Function...
Страница 384: ...Appendixes...
Страница 435: ...Revision History...