
ML610Q421/ML610Q422/ML610421User’s Manual
Chapter 22 Port A
22 – 5
22.2.4 Port A Control Registers 0, 1 (PACON0, PACON1)
Address: 0F252H
Access: R/W
Access size: 8/16 bits
Initial value: 00H
7
6
5
4
3
2
1
0
PACON0
PA7C0
PA6C0
PA5C0
PA4C0
PA3C0
PA2C0
PA1C0
PA0C0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
Address: 0F253H
Access: R/W
Access size: 8 bits
Initial value: 00H
7
6
5
4
3
2
1
0
PACON1
PA7C1
PA6C1
PA5C1
PA4C1
PA3C1
PA2C1
PA1C1
PA0C1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Initial value
0
0
0
0
0
0
0
0
PACON0 and PACON1 are special function registers (SFRs) to select input/output state of the Port A pin. The
input/output state is different between input mode and output mode. Input or output is selected by using the PADIR
register.
[Description of Bits]
•
PA7C1-PA0C1, PA7C0-PA0C0
(bits 7-0)
The PA7C1 to PA0C1 pins and the PA7C0 to PA0C0 pins are used to select high-impedance output, P-channel open
drain output, N-channel open drain output, or CMOS output in output mode and to select high-impedance input, input
with a pull-down resistor, or input with a pull-up resistor in input mode.
Setting of PA7 pin
When output mode is selected
(PA7DIR bit = “0”)
When input mode is selected
(PA7DIR bit = “1”)
PA7C1
PA7C0
Description
0
0
High-impedance output (initial value)
High-impedance input
0
1
P-channel open drain output
Input with a pull-down resistor
1
0
N-channel open drain output
Input with a pull-up resistor
1
1
CMOS output
High-impedance input
Setting of PA6 pin
When output mode is selected
(PA6DIR bit = “0”)
When input mode is selected
(PA6DIR bit = “1”)
PA6C1
PA6C0
Description
0
0
High-impedance output (initial value)
High-impedance input
0
1
P-channel open drain output
Input with a pull-down resistor
1
0
N-channel open drain output
Input with a pull-up resistor
1
1
CMOS output
High-impedance input
Setting of PA5 pin
When output mode is selected
(PA5DIR bit = “0”)
When input mode is selected
(PA5DIR bit = “1”)
PA5C1
PA5C0
Description
0
0
High-impedance output (initial value)
High-impedance input
0
1
P-channel open drain output
Input with a pull-down resistor
1
0
N-channel open drain output
Input with a pull-up resistor
1
1
CMOS output
High-impedance input
Содержание ML610421
Страница 1: ...ML610Q421 ML610Q422 ML610421 User s Manual Issue Date Feb 9 2015 FEUL610Q421 06...
Страница 15: ...Chapter 1 Overview...
Страница 44: ...Chapter 2 CPU and Memory Space...
Страница 49: ...Chapter 3 Reset Function...
Страница 53: ...Chapter 4 MCU Control Function...
Страница 69: ...Chapter 5 Interrupts INTs...
Страница 93: ...Chapter 6 Clock Generation Circuit...
Страница 110: ...Chapter 7 Time Base Counter...
Страница 121: ...Chapter 8 Capture...
Страница 129: ...Chapter 9 1 kHz Timer 1kHzTM...
Страница 135: ...Chapter 10 Timers...
Страница 160: ...Chapter 11 PWM...
Страница 172: ...Chapter 12 Watchdog Timer...
Страница 180: ...Chapter 13 Synchronous Serial Port...
Страница 195: ...Chapter 14 UART...
Страница 216: ...Chapter 15 I2 C Bus Interface...
Страница 231: ...Chapter 16 NMI Pin...
Страница 237: ...Chapter 17 Port 0...
Страница 246: ...Chapter 18 Port 1...
Страница 252: ...Chapter 19 Port 2...
Страница 259: ...Chapter 20 Port 3...
Страница 270: ...Chapter 21 Port 4...
Страница 282: ...Chapter 22 Port A...
Страница 290: ...Chapter 23 Melody Driver...
Страница 304: ...Chapter 24 RC Oscillation Type A D Converter...
Страница 327: ...Chapter 25 Successive Approximation Type A D Converter...
Страница 338: ...Chapter 26 LCD Drivers...
Страница 371: ...Chapter 27 Battery Level Detector...
Страница 378: ...Chapter 28 Power Supply Circuit...
Страница 381: ...Chapter 29 On Chip Debug Function...
Страница 384: ...Appendixes...
Страница 435: ...Revision History...