LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 125 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 8 Capture
8 – 4
8.2.3 Capture Status Register (CAPSTAT)
Address: 0F091H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
CAPSTAT
     
CAPF1 CAPF0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
CAPSTAT is a special function register (SFR) to indicate a state of the capture circuit.
[Description of Bits]
•
CAPF0 (bit 0)
The CAPF0 bit is the flag to indicate whether data is captured in capture data register 0
(CARP0) or not.
When the CAPF0 bit is set to "1", it indicates that data is captured in capture data register 0 (CAPR0).
When the CAPF0 bit is set to "1", the next capture operation is stopped. So perform the write operation to capture
data register 0 (CAPR0) to clear the CAPF0 bit to "0".
CAPF0 Description
0 No capture 0 latch (initial value)
1 Capture 0 latch
•
CAPF1 (bit 1)
The CAPF1 bit is the flag to indicate whether data is captured in capture data register 0
(CARP1) or not.
When the CAPF0 bit is set to "1", it indicates that data is captured in capture data register 0 (CAPR1).
When the CAPF1 bit is set to "1", the next capture operation is stopped. So perform the write operation to capture
data register 1 (CAPR1) to clear theCAPF0 bit to "0".
CAPF1 Description
0 No capture 1 latch (initial value)
1 Capture 1 latch