LAPIS Semiconductor ML610421, Руководство пользователя, Страница: 147 / 437

ML610Q421/ML610Q422/ML610421 User’s Manual
Chapter 10 Timers
10 – 12
10.2.10 Timer 0 Control Register 0 (TM0CON0)
Address: 0F032H
Access: R/W
Access size: 8 bits
Initial value: 00H
7 6 5 4 3 2 1 0
TM0CON0
    
T01M16 T0CS1 T0CS0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Initial value 0 0 0 0 0 0 0 0
TM0CON0 is a special function (SFR) to control a timer 0.
Rewrite TM0CON0 while the timer 0 is stopped (T0STAT of the TM0CON1 register is “0”).
[Description of Bits]
•
T0CS1, T0CS0 (bits 1, 0)
The T0CS1 and T0CS0 bits are used for selecting the operation clock of timer 0. LSCLK, HTBCLK, or the external
clock (P44/T02P0CK) can be selected by these bits.
T0CS1 T0CS0 Description
0 0
LSCLK (initial value)
0 1 HTBCLK
1 0 Prohibited (timer 0 does not operate)
1 1 External clock (P44/T02P0CK)
•
T01M16 (bit 2)
The T01M16 bit is used for selecting the operating mode of timer 0 and timer 1.
In 8-bit timer mode, each of timer 0 and timer 1 operates independently as a 8-bit timer.
In 16-bit timer mode, timer 0 and timer 1 are connected and they operate as a 16-bit timer.
In 16-bit timer mode, timer 1 is incremented by a timer 0 overflow signal. A timer 0 interrupt (TM0INT) is not
generated.
T01M16 Description
0
8-bit timer mode (initial value)
1
16-bit timer mode