Section 11: TSP command reference
Series 3700A System Switch/Multimeter Reference Manual
11-390
3700AS-901-01 Rev. D/June 2018
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to
Enable and transition registers
(on page C-19). The individual bits of this
register are defined in the following table.
Bit
Value
Description
B0
status.MEASUREMENT_SUMMARY_BIT
status.MSB
Set summary bit indicates that an enabled event in
the Measurement Event Register has occurred.
Bit B0 decimal value: 1
B1
status.SYSTEM_SUMMARY_BIT
status.SSB
Set summary bit indicates that an enabled event in
the System Summary Register has occurred.
Bit B1 decimal value: 2
B2
status.ERROR_AVAILABLE
status.EAV
Set summary bit indicates that an error or status
message is present in the error queue.
Bit B2 decimal value: 4
B3
status.QUESTIONABLE_SUMMARY_BIT
status.QSB
Set summary bit indicates that an enabled event in
the Questionable Status Register has occurred.
Bit B3 decimal value: 8
B4
status.MESSAGE_AVAILABLE
status.MAV
Set summary bit indicates that a response message
is present in the output queue.
Bit B4 decimal value: 16
B5
status.EVENT_SUMMARY_BIT
status.ESB
Set summary bit indicates that an enabled event in
the Standard Event Status Register has occurred.
Bit B5 decimal value: 32
B6
Not used
Not applicable
B7
status.OPERATION_SUMMARY_BIT
status.OSB
Set summary bit indicates that an enabled event in
the Operation Status Register has occurred.
Bit B7 decimal value: 128
In addition to the above constants,
requestEventRegister
can be set to the decimal equivalent of
the bits set. When more than one bit of the register is set,
requestEventRegister
contains the
sum of their decimal weights. For example, if 129 is returned, bits B0 and B7 are set (1 + 128).
Bit
B7
B6
B5
B4
B3
B2
B1
B0
Binary value
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
Decimal
128
64
32
16
8
4
2
1
Weights
(2
7
)
(2
6
)
(2
5
)
(2
4
)
(2
3
)
(2
2
)
(2
1
)
(2
0
)
Example
requestEventRegister = status.request_event
print(requestEventRegister)
Reads the status request event register.
Sample output:
1.02
Converting this output (129) to its binary
equivalent yields 1000 0001.
Therefore, this output indicates that the set bits of
the status request event register are presently B0
(MSB) and B7 (OSB).
Also see
(on page 11-373)
(on page 11-393)
Status byte and service request (SRQ)
(on page C-15)