Keithley 3700A Series, Справочное руководство

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Series 3700A System Switch/Multimeter Reference Manual Section 11: TSP command reference
3700AS-901-01 Rev. D/June 2018 11-385
Example 2
-- 18432 = binary 0100 1000 0000 0000
operationRegister = 18432
status.operation.enable = operationRegister
Uses a decimal value to set bits B11 and
B14 of the operation status user enable
register.
Also see
status.operation.* (on page 11-381)
status.questionable.*
These attributes manage the status model's questionable status register set.
Type TSP-Link accessible Affected by Where saved Default value
Attribute - - - - - - - -
.condition (R) Yes Not applicable Not saved Not applicable
.enable (RW) Yes Status reset Not saved 0
.event (R) Yes Status reset Not saved 0
.ntr (RW) Yes Status reset Not saved 0
.ptr (RW) Yes Status reset Not saved 32,256 (All bits set)
Usage
questionableRegister = status.questionable.condition
questionableRegister = status.questionable.enable
questionableRegister = status.questionable.event
questionableRegister = status.questionable.ntr
questionableRegister = status.questionable.ptr
status.questionable.enable = questionableRegister
status.questionable.ntr = questionableRegister
status.questionable.ptr = questionableRegister
questionableRegister
The status of the questionable status register; a zero (0) indicates no bits set
(also send 0 to clear all bits); other values indicate various bit settings
Details
These attributes are used to read or write to the questionable status registers. Reading a status
register returns a value. In the binary equivalent, the least significant bit is bit B0, and the most
significant bit is bit B15. For example, if a value of 1.04 (which is 12,288) is read as the value
of the condition register, the binary equivalent is 0011 0000 0000 0000. This value indicates that bits
B12 and B13 are set.
B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0
** > > > > > > > > > > > > > > *
0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0
* Least significant bit
** Most significant bit
For information about .condition, .enable, .event, .ntr, and .ptr registers, refer to Status register set
contents (on page C-1) and Enable and transition registers (on page C-19). The individual bits of this
register are defined in the following table.