Intel 810A3, Руководство по конструкции

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Intel
®
810A3 Chipset Design Guide 4-31
Layout and Routing Guidelines
4.14.5 Custom Solutions
As long as filter performance as specified in Figure 4-30 and other requirements outlined in
Section 4.14.3, “Filter Specification” on page 4-28 are satisfied, other solutions are acceptable.
Custom solutions should be simulated against a standard reference core model, which is shown in
Figure 4-33 .
NOTES:
1. 0.1
Ω
resistors represent package routing
1
.
2. 120 pF capacitor represents internal decoupling capacitor.
3. 1 K
Ω
resistor represents small signal PLL resistance.
4. Be sure to include all component and routing parasitics.
5. Sweep across component/parasitic tolerances.
6. To observe IR drop, use DC current of 30 mA and minimum VCC
CORE
level.
Figure 4-32. No Discrete R
L
C
<0.1 ohm route
PLL2
PLL1
370-Pin
Socket
<0.1 ohm route
VCC
CORE
Trace Resistance
Figure 4-33. Core Reference Model
PLL1
PLL2
Processor 0.1 ohm
120pF 1K ohm
0.1 ohm
1. For other modules (interposer, DMM, etc), adjust routing resistor if desired, but use minimum numbers.