Intel 810A3, Руководство по конструкции, Страница: 113 / 166

Intel
®
810A3 Chipset Design Guide 5-19
Advanced System Bus Design
5.4.4 Flight Time Definition and Measurement
Timing measurements consist of minimum and maximum flight times to take into account that
devices can turn on or off anywhere in a V
REF
Guardband region. This region is bounded by
V
REF
-
∆
V
REF
and V
REF
+
∆
V
REF.
The minimum flight time for a rising edge is measured from the
time the driver crosses V
REF
when terminated to a test load, to the time when the signal first
crosses V
REF
-
∆
V
REF
at the receiver (see Figure 5-11 ). Maximum flight time is measured to the
point where the signal first crosses V
REF
+
∆
V
REF
, assuming that ringback, edge rate, and
monotonicity criteria are met. Similarly, minimum flight time measurements for a falling edge are
taken at the V
REF
+
∆
V
REF
crossing and maximum flight time is taken at the V
REF
-
∆
V
REF
crossing.
5.5 Conclusion
AGTL+ routing requires a significant amount of effort. Planning ahead and leaving the necessary
time available for correctly designing a board layout will provide the designer with the best chance
of avoiding the more difficult task of debugging inconsistent failures caused by poor signal
integrity. Intel recommends planning a layout schedule that allows time for each of the tasks
outlined in this document.
Figure 5-10. Overdrive Region and V
REF
Guardband
V
REF
+ 200 mV
∆
∆
V
REF
+ 100 mV
V
REF
V
REF
- 100 mV
V
REF
- 200 mV
V
REF
V
REF
V
REF
Guardband
Overdrive Region (200 mV)
Overdrive Region (200 mV)
Figure 5-11. Rising Edge Flight Time Measurement
Overdrive Region
V
REF
Guardband
Driver Pin into
Test Load
Receiver Pin
Tflight-min
Tflight-max
V
REF
+ 200 mV
V
REF
+ 100 mV
V
REF
V
REF
- 100 mV
∆
V
REF
∆
V
REF