INSTRUCTION SET DESCRIPTIONS
C-28
LODS
Load String (Byte or Word):
LODS
src-string
Transfers the byte or word string
element addressed by SI to register AL
or AX and updates SI to point to the
next element in the string. This
instruction is not ordinarily repeated
since the accumulator would be
overwritten by each repetition, and
only the last element would be
retained.
Instruction Operands:
LODS src-string
LODS (repeat) src-string
When Source Operand is a Byte:
(AL)
←
(src-string)
if
(DF) = 0
then
(SI)
←
(SI) + DELTA
else
(SI)
←
(SI) – DELTA
When Source Operand is a Word:
(AX)
←
(src-string)
if
(DF) = 0
then
(SI)
←
(SI) + DELTA
else
(SI)
←
(SI) – DELTA
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
LOOP
Loop:
LOOP disp8
Decrements CX by 1 and transfers
control to the target location if CX is
not 0; otherwise the instruction
following LOOP is executed.
Instruction Operands:
LOOP short-label
(CX)
←
(CX) – 1
if
(CX)
≠
0
then
(IP)
←
(IP) + disp8 (sign-ext to 16 bits)
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
LOOPE
LOOPZ
Loop While Equal:
Loop While Zero:
LOOPE disp8
LOOPZ
disp8
Decrements CX by 1 and transfers
control is to the target location if CX is
not 0 and if ZF is set; otherwise the
next sequential instruction is executed.
Instruction Operands:
LOOPE short-label
LOOPZ short-label
(CX)
←
(CX) – 1
if
(ZF) = 1 and (CX)
≠
0
then
(IP)
←
(IP) + disp8 (sign-ext to 16 bits)
AF –
CF –
DF –
IF –
OF –
PF –
SF –
TF –
ZF –
Table C-4. Instruction Set (Continued)
Name
Description
Operation
Flags
Affected
NOTE: The three symbols used in the Flags Affected column are defined as follows:
– the contents of the flag remain unchanged after the instruction is executed
? the contents of the flag is undefined after the instruction is executed
ü
the flag is updated after the instruction is executed
Содержание 80C186EA
Страница 1: ...80C186EA 80C188EA Microprocessor User s Manual...
Страница 2: ...80C186EA 80C188EA Microprocessor User s Manual 1995...
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Страница 20: ...1 Introduction...
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Страница 28: ...2 Overview of the 80C186 Family Architecture...
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Страница 80: ...3 Bus Interface Unit...
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Страница 130: ...4 Peripheral Control Block...
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Страница 140: ...5 ClockGenerationand Power Management...
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Страница 166: ...6 Chip Select Unit...
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Страница 190: ...7 Refresh Control Unit...
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Страница 206: ...8 Interrupt Control Unit...
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Страница 239: ...INTERRUPT CONTROL UNIT 8 32...
Страница 240: ...9 Timer Counter Unit...
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Страница 265: ......
Страница 266: ...10 Direct Memory Access Unit...
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Страница 295: ...DIRECT MEMORY ACCESS UNIT 10 28...
Страница 296: ...11 Math Coprocessing...
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Страница 314: ...12 ONCE Mode...
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Страница 318: ...A 80C186 Instruction Set Additions and Extensions...
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Страница 330: ...B Input Synchronization...
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Страница 334: ...C Instruction Set Descriptions...
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Страница 383: ...INSTRUCTION SET DESCRIPTIONS C 48...
Страница 384: ...D Instruction Set Opcodes and Clock Cycles...
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Страница 408: ...Index...
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