60
IBM
Eserver
xSeries 455 Planning and Installation Guide
Complete the following steps to replace a DIMM in your server with the server
turned on:
1. Open the cover and verify that the memory hot-plug enabled LED on the
DIMM access door is lit before removing and replacing the DIMM.
2. Open the DIMM access door and verify that the memory port LED is off
before replacing a DIMM. Then open the retaining clip on each end of the
DIMM connector and remove the DIMM from the server.
3. Install the new DIMM. Take the usual anti-static precautions.
4. Close the DIMM access door.
Memory performance considerations
As shown in the server block diagram in Figure 1-4 on page 8, there are two
memory ports to the memory controller, each with a throughput of up to 3.2
GBps. These ports correspond to the ports as shown in Figure 3-2 on page 58.
The front-side bus of the processors is 6.4 GBps, so maximum performance is
achieved when both memory ports are used to access memory simultaneously.
Consequently, for maximum performance, you should install four DIMMs of the
same size at a time into a bank (see Table 3-4 on page 59). In this configuration,
all memory addresses are spread across all four DIMMs in the bank and, when
accessed, both memory ports are used.
Maximum performance can also be achieved with DIMMs of different sizes, as
long as the total memory in port 1 matches the total memory in port 2. For
example, if you have six DIMMs (four 512 MB DIMMs and two 1 GB DIMMs for a
total of 4 GB), install all four 512 MB DIMMs (2 GB) in port 1 and the two 1 GB
DIMMs (also 2 GB) in port 2.
If there is a mismatch between the total memory in port 1 and the total memory in
port 2, then there will be a delay when accessing the upper memory, for example,
if you have two 512 MB DIMMs and two 1 GB DIMMs.
Note: The memory hot-plug enabled LED flashes to indicate that data is being
mirrored on the replacement DIMMs. Wait until the LED stops flashing before
you hot-place DIMMs again.
Important: The XceL4 Accelerator Cache has been designed with
commercial workloads in mind that tend to have high cache hit rates. This
effectively boosts performance and compensates in part for the 3.2 GBps
bandwidth between the Cache and Scalability Controller and Memory
Controller.
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