SCR—Serial Control Register
H'FFDA
SCI
Bit
7
6
5
4
3
2
1
0
TIE
RIE
TE
RE
MPIE
TEIE
CKE1
CKE0
Initial value
0
0
0
0
0
0
0
0
Read/Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Clock Enable 0
0
Serial clock not output
1
Serial clock output at SCK pin
Clock Enable 1
0
Internal clock
1
External clock
Transmit End Interrupt Enable
0
TSR-empty interrupt request is disabled.
1
TSR-empty interrupt request is enabled.
Multiprocessor Interrupt Enable
0
Multiprocessor receive interrupt function is disabled.
1
Multiprocessor receive interrupt function is enabled.
Receive Enable
0
Receive disabled
1
Receive enabled
Transmit Enable
0
Transmit disabled
1
Transmit enabled
Receive Interrupt Enable
0
Receive interrupt and receive error interrupt requests are disabled.
1
Receive interrupt and receive error interrupt requests are enabled.
Transmit Interrupt Enable
0
TDR-empty interrupt request is disabled.
1
TDR-empty interrupt request is enabled.
311
Содержание H8/326 Series
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