(2) The A/D converter converts the voltage level at the AN
0
input pin to a digital value, and
transfers the result to register ADDRA.
(3) Next the A/D converter converts AN
1
and transfers the result to ADDRB. Then it converts
AN
2
and transfers the result to ADDRC.
(4) After all selected channels (AN
0
to AN
2
) have been converted, the AD converter sets the ADF
bit to “1.” If the ADIE bit is set to “1,” an A/D interrupt (ADI) is requested. Then the A/D
converter begins converting AN
0
again.
(5) Steps (2) to (4) are repeated cyclically as long as the ADST bit remains set to “1.”
To stop the A/D converter, software must clear the ADST bit to “0.”
Regardless of which channel is being converted when the ADST bit is cleared to “0,” when the
ADST bit is set to “1” again, conversion begins from the the first selected channel (AN
0
).
220
Содержание H8/326 Series
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