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5820A
Operators Manual
5-40
5-46.
Programming the STB and SRE
By resetting (to 0) the bits in the SRE, you can mask (disable) associated bits in the serial
poll status byte. Bits set to 1 enable the associated bit in the serial poll status byte. The
following sample BASIC program enables the Error Available (EAV) bit.
10 ! THIS PROGRAM SETS EAV IN THE SRE
20 PRINT @6,"*SRE 8" ! LOAD THE REGISTER
30 PRINT @6, "*SRE?" ! ASK FOR THE SRE CONTENTS
40 INPUT @6, A% ! RETRIEVE THE REGISTER CONTENTS
50 PRINT "SRE = ";A%
60 RETURN
The following BASIC program generates an error and checks the Serial Poll Status Byte.
Enable the EAV bit with the example above.
10 ! THIS PROGRAM GENERATES AN ERROR AND CHECKS IT
20 PRINT @6, "OUT 1300V" ! 1300V IS OUT OF 5820A RANGE
30 A% = SPL(6) ! DO A SERIAL POLL
40 IF ((A% AND 72%)=0%)THEN PRINT "EAV and RQS should have been set"
50 PRINT @6, "*STB?" ! RETRIEVE BYTE
60 INPUT @6, A%
70 IF ((A% AND 8%)=0%) THEN PRINT "EAV should have been set"
5-47.
Event Status Register (ESR)
The Event Status Register is a two-byte register in which the higher eight bits are always
0, and the lower eight bits represent various conditions of the 5820A Calibrator. The ESR
is cleared (set to 0) when the power is turned on, and every time it is read.
Many of the remote commands require parameters. Improper use of parameters causes
command errors to occur. When a command error occurs, bit CME (5) in the Event
Status Register (ESR) goes to 1 (if enabled in ESE register), and the error is logged in the
error queue.
5-48.
Event Status Enable (ESE) Register
A mask register called the Event Status Enable register (ESE) allows the controller to
enable or mask (disable) each bit in the ESR. When a bit in the ESE is 1, the
corresponding bit in the ESR is enabled. When any enabled bit in the ESR is 1, the ESB
bit in the Serial Poll Status Byte also goes to 1. The ESR bit stays 1 until the controller
reads the ESR or does a device clear, a selected device clear, or sends the reset or
*CLS
command to the calibrator. The ESE is cleared (set to 0) when the power is turned on.
5-49.
Bit Assignments for the ESR and ESE
The bits in the Event Status Register (ESR) and Event Status Enable register (ESE) are
assigned as shown in Figure 5-10.
Содержание 5820A
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