DBS9900 User’s Manual
DBS9900 Operation
3-3
82-28993 Revision 01
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an9900_clockControl
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an9900_clockFreq
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an9900_clockThreshold
3.1.2
Internal Sample Clock Parameters
Configuring the Internal Sample Clock requires the specification of a Desired Frequency. The
Desired Frequency range is dependent upon the type of plug-in module installed into the
DBS9900 carrier.
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The DBS9900 internal timebase is capable of a 60Hz to 100MHz range. The type(s) of plug-
ins may restrict the use of this entire range.
The DBS9900 will calculate an
Actual
Frequency
to a maximum error of better than 0.5% from
the Desired Frequency. It is the Actual Frequency that is used by the DBS9900. The dividers
used to calculate this actual frequency are available to the user in the software driver.
3.1.3
External Sample Clock Parameters
An External Sample Clock can be fed to either CLK 1 or CLK 2 for either module (I/O 1 and I/O
2).
3.1.4
External Reference Parameters
Defines an external signal to act as the reference signal for the PLL.
This signal may be applied to the DBS9900 Front Panel CLK 2 input SMA connector ONLY.
The default External Reference Voltage Threshold is 0V.
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