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DBS9900 User’s Manual

7-10

DBS9900 Clock

82-28993 Revision 01

Table 10 - FUNCTION LATCH Address Base + 0x18 (2h or 3h)

Base +
0X18

F Latch (PLL 0)

FUNCTION

Default

Data Bus

C=2h or 3h

D[03]

C[4]

Control bit, set to 0

Set to 0

R/W

D[02]

C[3]

Control bit, set to 0

Set to 0

R/W

D[01]

C[2]

Control bit, set to 1

Set to 0

R/W

D[00]

C[1]

Control bit, set to 0 or 1

Set to 0

R/W

C[4:1]

is set to

3h,

the same data as

C[4:1] = 2h

will be loaded into the function latch with the

addition of providing a reset pulse to reset the

R-COUNTER

N-COUNTER

and

TIMEOUT

counters. This re-synchronizes the counters.

The power down feature of the LMX2306 is not used on the DBS9900.

F2, F10, F18

should be

set low.

The FastLock function on the LMX2306 is not used on the DBS9900.

F[14:8]

should be set low.

tri-states the charge pump integrator output. For normal operation, set

low.

selects the polarity of the phase detector.

should be set high when the VCO gain slope is

positive.

should be set low when the VCO gain slope is negative. The JTOS-200 VCO has a

positive gain slope. The integrator loop inverts the polarity of the control signal; therefore,

should be set low.

control the function of the

FO_LD

(pin14). The internal MUX routes several internal

nodes to pin14. The nodes are listed in the following table.

Bits

F[5:3]

are decoded in the following way:

Table 11 – FO_LD Register Map Base + 0x14

F[5:3]

FO_LD

000

TRI-STATE

001

Digital Lock Detect (Default)

010

N Divider Output (Fpd)

011

Active High

100

R Divider Output (Fpd)

101

N Channel Open Drain Lock Detect

110

Serial Data Output

111

Active Low

Setting

F[5:3]

and

is useful to determine if the reference oscillator and VCO are being

properly divided down to

Fpd

. This aids in trouble shooting the PLL.

F[5:3]

set to

1h (Default)

makes digital lock detect available to the host. Under normal operation,

F[5:3]

should be

programmed to

to determine if the PLL is in frequency lock.

F[1]

enables and disables the counter RESET. This function resets the counters internal to the

LMX2306 to their initial reset state. When set high, the counter RESET is enabled. When set low,
the counter RESET is disabled.

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Содержание DBS9900

Страница 1: ...ess underutilized and idle equipment along with credit for buybacks and trade ins Custom engineering so your equipment works exactly as you specify Critical and expedited services Leasing Rentals Demo...

Страница 2: ...High Performance VXI Carrier User s Manual Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 3: ...l in the efficient use of the instrument described herein Publication of this information does not convey any rights to reproduce it or to use it for any purpose other than in connection with the inst...

Страница 4: ...s for performance of service c When the product is returned for repair a copy of the original bill of sale or invoice is sent with the product d Analogic will not be liable for any incidental or conse...

Страница 5: ...e Clock Timebase used by the DBS9900 as a reference for both installed modules I O 1 and I O 2 This PLL 10MHz reference signal is provided internally by default but an External signal may be used Can...

Страница 6: ...actions ou situations qui peuvent pr senter un risque de blessure ou de d c s ATTENTION Une mise en garde d butant par le terme ATTENTION informe des actions que peuvent endommager le met riel produir...

Страница 7: ...ence of flammable gases or fumes Operation of the unit in any such environment constitutes a definite safety hazard AVERTISSEMENT Ne pas faire fonctionner l unit en pr sence de gaz ou de vapeurs infla...

Страница 8: ...Self Test 2 6 2 8 DBS9900 Module Pin Connections 2 7 2 9 DBS9900 26 Pin Control Connector 2 8 3 Operation 3 1 3 1 Sample Clock and Timebase 3 2 3 1 1 Possible Clock Configurations 3 2 3 1 2 Internal S...

Страница 9: ...duleControl 5 15 5 3 3 Module Control Query an9900_moduleControl_Q5 16 5 3 4 EEPROM Port Write an9900_eepromPortWrite 5 17 5 3 5 EEPROM Port Query an9900_eepromPort_Q 5 18 5 3 6 EEPROM Write Enable an...

Страница 10: ...er 5 51 5 6 19 Clock A B Threshold an9900_clockThreshold 5 52 5 6 20 Clock A B Threshold Query an9900_clockThreshold_Q 5 53 5 6 21 Trigger A B Threshold an9900_triggerThreshold 5 54 5 6 22 Trigger A B...

Страница 11: ...ION LATCH 7 8 7 7 Clock Control Register 7 11 7 7 1 Clock Control Description 7 12 7 8 LSDIV Low Speed Divider Register 7 12 7 9 Time Base Control Register 7 15 7 9 1 TIME BASE CLOCK Inputs 7 16 7 9 2...

Страница 12: ...he entire VXI interface is implemented in a single device provides increased reliability and lower cost Versatile clocking and triggering is provided via internal circuitry front panel connectors and...

Страница 13: ...h account number Our Customer Service Coordinator will provide you a Customer Service Order number CSO that is an internal Analogic tracking number The Service Coordinator will also inform you of the...

Страница 14: ...on in contacting Analogic Customer Service and including the CSO Number with your return as requested above will allow us to properly track your returned goods and expedite repair and return Artisan T...

Страница 15: ...DBS9900 User s Manual 1 4 DBS9900 User s Manual 82 28993 Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 16: ...N This product contains components which are sensitive to electrostatic discharge ESD Be sure to follow proper procedures for handling storing and transporting ESD sensitive assemblies 2 2 Host Comput...

Страница 17: ...cators on the front panel They are POWER CH 1 ACTIVE and CH 2 ACTIVE The power LED is yellow during self test If DC power is OK at the end of the self test it will turn green The CH1 and CH2 LEDs are...

Страница 18: ...C I O_2 12 I O_5_B Reserved 21 GND 4 901 MARKER I O_2 13 GND 22 901 ADVANCE I O_2 5 901 SYNC I O_1 14 GND 23 901 ADVANCE I O_1 6 901 MARKER I O_1 15 GND 24 GND 7 I O_3_A Reserved 16 GND 25 902 DATA_TA...

Страница 19: ...located as shown in the figure below The Logical Address value indicated by this selector corresponds to bits 6 13 of the device register base address Bits 14 and 15 of the base address are both 1 and...

Страница 20: ...ine jumper location when setting the jumpers for A24 or A32 Communications Mode Note A24 is only recommended when using a GPIB VXI C VXI controller P2 P1 1 2 3 4 5 6 7 8 A13 A12 A11 A10 A9 A8 A7 A6 S1...

Страница 21: ...p Action 1 Insert CD ROM 2 The installation should proceed automatically via an InstallShield wizard Follow the instructions as they appear 2 7 Start Up and Verification 2 7 1 Self Test When the VME b...

Страница 22: ...st output signal In O C 1 Int_clk Interface clock out 1 Sam_clock Sample Clock out 2 Size 3 0 Memory size required in 4 Done Module Waveform terminated in 1 Installed Module installed in slot in 1 clk...

Страница 23: ...DVANCE 6 Mod A MARKER 15 GND 24 GND 7 Mod A 3 16 GND 25 Mod A 7 8 Mod A 2 17 Mod A 5 26 Mod A 6 9 Mod A 1 18 Mod A 4 All pins labeled by the module name and a number e g MOD A 1 are uncommitted pins t...

Страница 24: ...hrough front panel connectors labeled CLK1 and CLK2 to control the sample rate A programmable threshold External Trigger is also supplied for each module through front panel connectors labeled TRIG1 a...

Страница 25: ...se THEN I O 2 can be set up to use Driver SFP Internal Sample Clock same as I O 1 External Sample Clock using CLK 1 Internal Sample Clock Internal Reference timebase External Sample Clock using CLK 2...

Страница 26: ...e an Actual Frequency to a maximum error of better than 0 5 from the Desired Frequency It is the Actual Frequency that is used by the DBS9900 The dividers used to calculate this actual frequency are a...

Страница 27: ...installed Frequency Setting Resolution 500 PPM of set frequency Worst case is 50 kHz at 100 MS s Frequency Accuracy 50 PPM of frequency setting Settling Time 1 ms to 2 typ Phase Jitter 1 s measurement...

Страница 28: ...via 2 front panel mounted SMA connectors or via VXI TTLTRG ECLTRG lines Edge Trigger Modes Programmable Start on rising edge or start on falling edge Gated Trigger Modes Programmable Run when high an...

Страница 29: ...RONMENTAL AND MECHANICAL Ambient Operating Temperature Range 0 C to 40 C for rated specifications Storage Temperature Range 25 C to 75 C non condensing Cooling Air Flow 4 litre sec For 10 rise at 10 m...

Страница 30: ...mming environments Source code is also provided with the fully functional soft front panels 3 2 11 EMC SAFETY AGENCY COMPLIANCE Meets all requirements for Safety and EMC for the US Canada and Europe a...

Страница 31: ...DBS9900 User s Manual 3 8 DBS9900 Operation 82 28993 Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 32: ...screen to appear when the DBS9900 Soft Front Panel software is opened From this panel the following operations may be performed Initialization of DBS9900 units found in the VXI system Selection and Co...

Страница 33: ...t to Instrument Brings up the selected instrument If no instrument is installed nothing happens when pressing the Connect to Instrument button Active Indicator Illuminates when the DBS9900 that is hig...

Страница 34: ...es The DBS9900 will calculate an Actual Frequency to less than 0 4 from the Desired Frequency and display this in the Internal Sample Clock box The dividers used to calculate this frequency will also...

Страница 35: ...9900 User s Manual 4 4 DBS9900 Soft Front Panel 82 28993 Revision 01 Figure 4 2 DBS9900 SFP Sample Clock Panel Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg c...

Страница 36: ...ult is Internal External Sample Clock Box This entire box is grayed out except when Clock Mode is set to External I O 1 Two position target switch that selects either the CLK 1 or CLK 2 input on the D...

Страница 37: ...28993 Revision 01 4 3 DBS9900 Trigger Panel All of the following controls are duplicated in both the I O 1 and I O 2 boxes Figure 4 3 DBS9900 SFP Trigger Panel Artisan Technology Group Quality Instru...

Страница 38: ...used for a given trigger input Threshold Bipolar scrolling control with a resolution of X X Volts The threshold control for I O 2 will be grayed out if the user has selected Front Panel Ch 1 or Front...

Страница 39: ...DBS9900 User s Manual 4 8 DBS9900 Soft Front Panel 82 28993 Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 40: ...ction Prototype ViStatus _VI_FUNC an9900_init ViRsrc resourceName ViBoolean IDQuery ViBoolean resetDevice ViPSession vi an9900_init Parameters Variable Type Description INPUT resourceName ViRsrc Speci...

Страница 41: ..._VITinit ViRsrc resourceName ViBoolean IDQuery ViBoolean resetDevice ViSession instrumentHandle an9900_VITinit Parameters Variable Type Description INPUT resourceName ViRsrc Specifies the interface an...

Страница 42: ...BFFC0002 BFFC0003 BFFF0000 BFFF000E BFFF0015 BFFF0034 BFFF0035 BFFF0036 BFFF0037 BFFF0038 BFFF003A BFFF005F BFFF0060 BFFF0067 ViStatus No error the call was successfully Parameter 2 ID Query out of r...

Страница 43: ...UT instrumentHandle ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session module AN9900_MODULE AN9900_MOD_A Module A...

Страница 44: ...E type an9900_identifyModule Parameters Variable Type Description INPUT vi ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument dri...

Страница 45: ...Variable Type Description INPUT instrumentHandle ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session Default Value...

Страница 46: ...ndicate the type of memory requirements the device type code the revision level of the PCB generate the SOFT RESET inhibit SYSFAIL generation enable A24 A32 memory access return the value of the statu...

Страница 47: ...ired instrument driver session OUTPUT memoryRequirements ViUInt16 passed by reference The Value will be 0xm21r where m is dependent on the memory requirements of the DBS9900 with any daughter boards i...

Страница 48: ...nstrument driver session softReset ViUInt16 Selects to RESET the DBS9900 registers or to enable access to them 1 Resets DBS9900 Registers 0 Enables access to DBS9900 sysfailInhibit ViUInt16 Selects to...

Страница 49: ...nstrument Handle returned by the Initialize function to select the desired instrument driver session OUTPUT status ViUInt16 passed by reference Returns the value of the status control register RETURN...

Страница 50: ...el ViUInt16 Selects one of seven interrupt levels that the DBS9900 will interrupt on 0 No Interrupt 1 Level 1 2 Level 2 3 Level 3 4 Level 4 5 Level 5 6 Level 6 7 Level 7 interruptVector ViUInt16 Conta...

Страница 51: ...terruptVector ViUInt16 passed by reference Contains the lower 8 bits of the STATUS ID or interrupt vector that will be returned to the host during interrupt Acknowledge cycles module ViUInt16 passed b...

Страница 52: ...information about specific module status selects one of two modules and calibration port writes data to the specified EEPROM location of the active module reads data back from the specified EEPROM loc...

Страница 53: ...the Initialize function to select the desired instrument driver session module ViUInt16 Selects the module from which information is desired 1 Module 2 0 Module 1 OUTPUT present ViUInt16 passed by ref...

Страница 54: ...e to be selected from the register set 1 Module B 0 Module A calPortRelay ViUInt16 Selects the channel to be connected to the cal port 1 Channel 2 connected to CAL port 0 Channel 1 connected to CAL po...

Страница 55: ...UInt16 passed by reference Returns the module selected for the register set calPortRelay ViUInt16 passed by reference Returns the channel connected to the cal port SPRRLY1 ViUInt16 passed by reference...

Страница 56: ...is control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session offset ViUInt16 Specifies the EEPROM offset to which to write data eeData V...

Страница 57: ...ccepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session offset ViUInt16 Specifies the EEPROM offset from which to read data OUTPUT eeData ViUIn...

Страница 58: ...accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session writeEnable ViUInt16 Selects to enable or disable data write to the EEPROM 1 Enable E...

Страница 59: ...strumentHandle ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session baseAddress ViUInt16 Defines the base address of...

Страница 60: ...d instrument driver session OUTPUT baseAddress ViUInt16 passed by reference Returns the base address of the A24 or A32 operational registers The m 1 most significant bits are the values of the m 1 mos...

Страница 61: ...ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session OUTPUT memoryAttributes ViUInt16 passed by reference Lists impo...

Страница 62: ...ntrol accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session memoryAccess int Defines whether memory is enabled or not OUTPUT None None None...

Страница 63: ...nstrument driver session mod AN9900_MODULE AN9900_MOD_A Module A selected AN9900_MOD_B Module B selected src AN9900_TRIGSRC AN9900_TRIGSRC_REG Select Software Trigger AN9900_TRIGSRC_ECL0 Select Backpl...

Страница 64: ...le B selected OUTPUT src AN9900_TRIGSRC AN9900_TRIGSRC_REG Software Trigger selected AN9900_TRIGSRC_ECL0 Backplane ECL trigger selected AN9900_TRIGSRC_ECL0 Backplane ECL trigger selected AN9900_TRIGSR...

Страница 65: ...OD_A Module A selected AN9900_MOD_B Module B selected out AN9900_TRIGOUT AN9900_TRIGOUT_NONE Not driving trigger AN9900_TRIGSRC_ECL0 Select Backplane ECL output AN9900_TRIGSRC_ECL0 Select Backplane EC...

Страница 66: ...900_MOD_A Module A selected AN9900_MOD_B Module B selected OUTPUT out AN9900_TRIGOUT AN9900_TRIGSRC_NONE No trigger output selected AN9900_TRIGSRC_ECL0 Backplane ECL output selected AN9900_TRIGSRC_ECL...

Страница 67: ...ndle returned by the Initialize function to select the desired instrument driver session mod AN9900_MODULE AN9900_MOD_A Set trigger polarity for Module A AN9900_MOD_B Set trigger polarity for Module B...

Страница 68: ...Initialize function to select the desired instrument driver session mod AN9900_MODULE AN9900_MOD_A Get trigger polarity set for Module A AN9900_MOD_B Get trigger polarity set for Module B OUTPUT pol A...

Страница 69: ...tion INPUT vi ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session mod AN9900_MODULE AN9900_MOD_A Set trigger thresh...

Страница 70: ...INPUT vi ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session mod AN9900_MODULE AN9900_MOD_A Get trigger threshold s...

Страница 71: ...xC TTL4 0xD TTL5 0xE TTL6 0xF TTL7 modAtriggerOuput ViUInt16 Selects the trigger output for Module A 0x0 Not Driving Trigger 0x6 ECL0 0x7 ECL1 0x8 TTL0 0x9 TTL1 0xA TTL2 0xB TTL3 0xC TTL4 0xD TTL5 0xE...

Страница 72: ...nction to select the desired instrument driver session OUTPUT modAtriggerInput ViUInt16 passed by reference Returns the trigger input for Module A modAtriggerOuput ViUInt16 passed by reference Returns...

Страница 73: ...sing Edge Trigger 0 Falling Edge Trigger softTriggerA ViUInt16 Specifies the condition of the soft trigger 1 Trigger 0 Inactive gateEnableB ViUInt16 Selects between edge or gated trigger 1 Gated Trigg...

Страница 74: ...Edge Trigger 0 Falling Edge Trigger softTriggerA ViUInt16 passed by reference Outputs the condition of the soft trigger 1 Trigger 0 Inactive gateEnableB ViUInt16 passed by reference Outputs edge or g...

Страница 75: ...no clock time base clock Channel A or Channel B clock information to the daughter boards Additionally functions are provided which set the value of the R and N counter sets the value of the High Speed...

Страница 76: ...ect the desired instrument driver session mod AN9900_MODULE AN9900_MOD_A Set clock source for Module A AN9900_MOD_B Set clock source for Module B src AN9900_CLKSRC AN9900_CLKSRC_NONE No clock No wave...

Страница 77: ...t the desired instrument driver session mod AN9900_MODULE AN9900_MOD_A Get clock source set for Module A AN9900_MOD_B Get clock source set for Module B OUTPUT src AN9900_CLKSRC AN9900_CLKSRC_NONE No c...

Страница 78: ...e aware of this Function Prototype ViStatus _VI_FUNC an9900_setIntClockRef ViSession vi AN9900_CLKREF ref an9900_setIntClockRef Parameters Variable Type Description INPUT vi ViSession This control acc...

Страница 79: ...i ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session OUTPUT ref AN9900_CLKREF passed by reference Internal clock r...

Страница 80: ...0_EXTCLK mod ViReal64 thresh an9900_setClockThreshold Parameters Variable Type Description INPUT vi ViSession This control accepts the Instrument Handle returned by the Initialize function to select t...

Страница 81: ...l64 thresh an9900_getClockThreshold Parameters Variable Type Description INPUT vi ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrum...

Страница 82: ...pleted but an exception condition occurred which may require attention Error The function did not complete successfully 5 6 8 Get Sample Rate an9900_getSampleRate This function returns the actual samp...

Страница 83: ...ogram unnecessarily in most cases Function Prototype ViStatus _VI_FUNC an9900_awaitPLLLock ViSession vi ViUInt16 timeout an9900_awaitPLLLock Parameters Variable Type Description INPUT vi ViSession Thi...

Страница 84: ...ViSession This control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session frequency ViReal64 Desired frequency for the clock OUTPUT None...

Страница 85: ...e function to select the desired instrument driver session OUTPUT frequency ViReal64 passed by reference Returns the actual clock frequency NCounter ViUInt32 passed by reference Returns the value of t...

Страница 86: ...lock selector multiplexers 1 Enable 0 Disable EXTCLKBenable ViUInt16 Enables the signal present on the input of Clock B to pass through the Channel B threshold comparator to the Clock selector multipl...

Страница 87: ...select the desired instrument driver session OUTPUT EXTCLKAenable ViUInt16 passed by reference Signal present on the input of Clock A enable EXTCLKBenable ViUInt16 passed by reference Signal present o...

Страница 88: ...2_error_message function to get a textual description of errors and warnings 5 6 15 R Counter Query an9900_rCounter_Q This function returns the value of the R counter Function Prototype ViStatus an990...

Страница 89: ...s the Instrument Handle returned by the Initialize function to select the desired instrument driver session NCounter ViUInt16 Sets the value of the N counter valid range OUTPUT None None None RETURN 0...

Страница 90: ...OTE Use the an902_error_message function to get a textual description of errors and warnings 5 6 18 Low Speed Divider an9900_lowSpeedDivider This function sets the value of the Low Speed Divider Funct...

Страница 91: ...the Instrument Handle returned by the Initialize function to select the desired instrument driver session CLKAThreshold ViReal64 Specifies the Clock A zero crossing threshold CLKBThreshold ViReal64 Sp...

Страница 92: ...ed by the Initialize function to select the desired instrument driver session OUTPUT CLKAThreshold ViReal64 passed by reference Returns the bit mask of the Clock A zero crossing threshold CLKBThreshol...

Страница 93: ...is control accepts the Instrument Handle returned by the Initialize function to select the desired instrument driver session triggerAThreshold ViReal64 Bit mask with Trigger A zero crossing threshold...

Страница 94: ...s the Instrument Handle returned by the Initialize function to select the desired instrument driver session OUTPUT triggerAThreshold ViReal64 passed by reference Bit mask with Trigger A zero crossing...

Страница 95: ...instrument driver session FO_LD ViUInt16 Selects the FO_LD configuration 0 Tri State 1 Digital Lock Detect 2 N Divider Output 3 Active High 4 R Divider Output 5 N Channel Open Drain Lock Detect 6 Seri...

Страница 96: ...ect ViUInt16 Specifies the Frequency select options for the clock 0 Disable Time Base Clock 1 Enables LSDIV 2 Enables HSDIV FF 3 Enables HSDIV Divider internalReference ViUInt16 Enable Internal Refere...

Страница 97: ..._VI_FUNC an9900_getErrorText ViSession vi ViStatus status ViChar desc an9900_getErrorText Parameters Variable Type Description INPUT vi ViSession This control accepts the Instrument Handle returned by...

Страница 98: ...Initialize function to select the desired instrument driver session registerNumber ViUInt16 Specifies which register is to be written Valid range 0x00 0x3F Default value 0x00 mask ViUInt16 Masks the d...

Страница 99: ...the Initialize function to select the desired instrument driver session registerNumber ViUInt16 Specifies register to be written Valid range 0x00 0x3F Default is 0x00 value ViUInt16 This control writ...

Страница 100: ...Handle returned by the Initialize function to select the desired instrument driver session registerNumber ViUInt16 Number in hex of the register to be accessed Valid range 0x00 0x2F Default is 0x00 OU...

Страница 101: ...ViStatus an9900_reset ViSession instrumentHandle an9900_reset Parameters Variable Type Description INPUT instrumentHandle ViSession This control accepts the Instrument Handle returned by the Initiali...

Страница 102: ...lize function to select the desired instrument driver session errorCode ViStatus This control accepts the Status Code returned from the instrument driver functions Default Value 0 VI_SUCCESS OUTPUT er...

Страница 103: ...DBS9900 User s Manual 5 64 DBS9900 Driver Software 82 28993 Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 104: ...but is actually two independent devices functionally The DBS9900 supports D32 transfers to the daughter board module registers memory only 0x20 0x3E D32 transfers are not supported to the registers p...

Страница 105: ...2 Device Type 0xm21r R only 16 0x04 Status Control Register R W 16 0x06 Memory Offset Register R W 0x08 Memory Attribute Register 0xEE70 R only 16 0x0A Module Select RELAY Register R W 16 0x0C Trigger...

Страница 106: ...r board module will have a JTAG port that will be a communication port to a continuous JTAG chain for programming and testing any ISP programmable devices that may be resident on the modules Programmi...

Страница 107: ...N A 0011 128 M 3 N A 0100 64 M 4 N A 0101 32 M 5 N A 0110 16 M 6 N A 0111 8M 7 N A 1000 4 M 8 0 1001 2 M 9 1 1010 1024 k A 2 1011 512 k B 3 1100 256 k C 4 1101 128 k D 5 1110 64 k E 6 1111 32 k F 7 Th...

Страница 108: ...ENABLE Enables DBS9900 memory access Disconnects DBS9900 memory 6 4 Status Register The STATUS REGISTER 0x04 is used to read back the CONTROL REGISTER bits READY PASSED and VXI MODID It is also used t...

Страница 109: ...D12 MOD B SPARE Module B spare Module B spare D13 Not Used Not Used D14 MODID Device not selected Device selected D15 A24 A32 ACTIVE DBS9900 memory access enabled DBS9900 memory access disabled 6 5 M...

Страница 110: ...20 to 0x3E One set is dedicated to each daughter board module The SELECT bit switches in one set or the other so that both devices can be controlled The memory is also switched at the same time to all...

Страница 111: ...plane trigger lines This is selected by the same Trigger output Select field in the Trigger Source Control Register that selects the primary trigger output The SYNC signal will always drive BP_TRIGOUT...

Страница 112: ...t affected by the SLOPE bit It is always high true regardless of the level of the SLOPE bit A Software Advance function is also provided that can be used to Advance to the next segment or to Branch to...

Страница 113: ...Acknowledge cycles The DBS9900 responds to D16 Interrupt Acknowledge cycles at the level set by the interrupt level register The upper 6 bits of the 16 bit vector are always driven to zero If D9 is s...

Страница 114: ...ghter board modules are plugged in and removed Bit D1 is the JTAG TMS Time Multiplexed Signal and bit D0 is the JTAG Data signal The JTAG clock signal is automatically generated by the VXI interface I...

Страница 115: ...DBS9900 User s Manual 6 12 DBS9900 Registers 82 28993 Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 116: ...rammed to generate frequencies Fvco from 100MHz to 200MHz in 50kHz steps The wide adjustment range over two to one is achieved by a wide frequency range voltage controlled oscillator Mini Circuits JTO...

Страница 117: ...that is as close as possible to the desired frequency you could check every possible solution and look for the minimum error or you could follow the algorithm following Table 12 This algorithm guaran...

Страница 118: ...ock Loop It consists of a 21 bit serial to parallel data register 14 bit R COUNTER 18 bit N COUNTER divide by 8 9 dual modulus pre scalar 18 bit FUNCTION LATCH phase detector and an output charge pump...

Страница 119: ...ol word C 4 1 is concatenated to the end of the bit string and controls the register inside the PLL that is to be loaded upon completion of the serial transfer The MSB s of the R COUNTER are to be loa...

Страница 120: ...0 R W R COUNTER R 00c8h D 10 R 14 B13 MSB Set to 0 R W D 09 R 13 B12 Set to 0 R W D 08 R 12 B11 Set to 0 R W D 07 R 11 B10 Set to 0 R W D 06 R 10 B9 Set to 0 R W D 05 R 9 B8 Set to 0 R W D 04 R 8 B7 S...

Страница 121: ...ia the data input on the rising edge of the clock when the Latch Enable PLL_LE goes low Loading is complete after 21 rising edges The internal register is latched on the rising edge of PLL_LE The N CO...

Страница 122: ...R W D 03 N 7 B1 Set to 0 R W D 02 N 6 B0 LSB Set to 0 R W D 01 N 5 Not Used Set to 0 R W D 00 N 4 Not Used Set to 0 R W Table 6 N Counter Register Map PLL 0 Base 0x16 Base 0X16 N Counter PLL 0 FUNCTI...

Страница 123: ...The control word C 4 1 is concatenated to the end of the bit string and controls the register inside the PLL that is to be loaded upon completion of the serial transfer The software driver writes the...

Страница 124: ...et to 0 R W D 07 F 11 Not Used Set to 0 R W D 06 F 10 Not Used Set to 0 R W D 05 F 9 Not Used Set to 0 R W D 04 F 8 Not Used Set to 0 R W D 03 F 7 CP Tri State Set to 0 R W D 02 F 6 PD Polarity Set to...

Страница 125: ...200 VCO has a positive gain slope The integrator loop inverts the polarity of the control signal therefore F6 should be set low F5 to F3 control the function of the FO_LD pin14 The internal MUX route...

Страница 126: ...sed Not Used Set to 0 R W D 13 Not Used Not Used Set to 0 R W D 12 Not Used Not Used Set to 0 R W D 11 Not Used Not Used Set to 0 R W D 10 Not Used Not Used Set to 0 R W D 09 Not Used Not Used Set to...

Страница 127: ...table Table 14 CHA_CLKSEL 1 0 Decode CHA_CLKSEL 1 0 FUNCTION 00 Route No Clock to Module A Default R W 01 Route Internal Time Base Clock to Module A R W 10 Route Channel A Clock to Module A R W 11 Rou...

Страница 128: ...he output The HSDIV divider should be programmed to 7h when the low speed divider is being used LSDIV divides Fvco by the formula Ftb Fvco 16 LSDIV 15 0 2 where 0 LSDIV 15 0 65 535 The possible divisi...

Страница 129: ...to 0 Set to 0 R W D 02 C 3 Control bit set to 1 Set to 0 R W D 01 C 2 Control bit set to 0 Set to 0 R W D 00 C 1 Control bit set to 1 Set to 0 R W LOW SPEED DATA REGISTER CONTROL Lines 5 28993 To wri...

Страница 130: ...l Reference Oscillator Set to 0 R W D 11 Not Used Not Used Set to 0 R W D 10 Not Used Not Used Set to 0 R W D 09 FREQSEL 1 TB select line MSB Set to 0 R W D 08 FREQSEL 0 TB select line LSB Set to 0 R...

Страница 131: ...divider should be programmed to HSDIV 3 0 7h divide ratio of 8 LSDIV can be programmed to modify the output clock frequency with divide ratios of 32 to 1 048 592 in steps of 16 95 36598Hz to 6 25MHz...

Страница 132: ...A This register instructs the FPGA that the next register writes the HSDIV Register at 0x14 The hardware transfers data to the 6 bit ECL counter When the PLL_EN INTREF is active high and REFSEL FREQSE...

Страница 133: ...ult Data Bus C 7h D 03 C 4 Control bit set to 0 Set to 0 R W D 02 C 3 Control bit set to 1 Set to 0 R W D 01 C 2 Control bit set to 1 Set to 0 R W D 00 C 1 Control bit set to 1 Set to 0 R W 7 11 Clock...

Страница 134: ...Set to 0 R W D 02 C 3 Control bit set to 0 Set to 0 R W D 01 C 2 Control bit set to 0 Set to 0 R W D 00 C 1 Control bit set to 0 Set to 0 R W 7 12 Clock B Threshold Register The Clock B Threshold Reg...

Страница 135: ...1 Set to 0 R W D 02 C 3 Control bit set to 0 Set to 0 R W D 01 C 2 Control bit set to 0 Set to 0 R W D 00 C 1 Control bit set to 1 Set to 0 R W 7 13 Trigger A Threshold Register The Trigger A Threshol...

Страница 136: ...o 1 Set to 0 R W D 02 C 3 Control bit set to 0 Set to 0 R W D 01 C 2 Control bit set to 1 Set to 0 R W D 00 C 1 Control bit set to 0 Set to 0 R W 7 14 Trigger B Threshold Register The Trigger B Thresh...

Страница 137: ...to 0 R W D 00 TRGB_THRESH 0 LSB Set to 0 R W Table 34 Time Base Address Map Base 0x18 Bh Base 0X18 Time Base Address FUNCTION Default Data Bus TB CONTROL D 03 C 4 Control bit set to 1 Set to 0 R W D 0...

Страница 138: ...35 Threshold DAC Decoding DAC_WR DAC_A 1 0 Latch State 1 XX Input Data Latched 0 00 Clock A Threshold 0 01 Clock B Threshold 0 10 Trigger A Threshold 0 11 Trigger B Threshold Artisan Technology Group...

Страница 139: ...DBS9900 User s Manual 7 24 DBS9900 Clock 82 28993 Revision 01 Artisan Technology Group Quality Instrumentation Guaranteed 888 88 SOURCE www artisantg com...

Страница 140: ...nce the frequency is in the range of 95 36598Hz to 6 25MHz select the LSDIV divider 2 Calculate LSDIVw ROUND 50kHz 324 1 2 1 8 4000 38 580 3 Calculate Nw ROUND 324 50kHz 2 8 38 580 4000 4 Program N 40...

Страница 141: ...ter Reset 0h F 3 1 4h 04h D 4 0 4h Program Time Base Divider Program HSDIV Register Write 0007h to Addr 0x18 Set Address to HSDIV Register Write 7h to Addr 0x14 8 HSDIV HEX HSDIV 1 7h HSDIV 3 0 D 15 0...

Страница 142: ...L_EN INTREF FREQSEL 1 0 MODA off MODB off 0 0 0h 0h 0 0 0 0h TB MODA MODB off 0 0 1h 0h 0 1 1 1h 2h 3h CHA MODA MODB off 1 0 2h 0h 0 0 0 0h CHB MODA MODB off 0 1 3h 0h 0 0 0 0h MODA off TB MODB 0 0 0h...

Страница 143: ...MODB off 0 1 1h 0h 1 CHA MODA MODB off 1 0 2h 0h 1 CHB MODA MODB off 0 1 3h 0h 1 MODA off TB MODB 0 1 0h 1h 1 TB MODA TB MODB 0 1 1h 1h 1 CHA MODA TB MODB 1 1 2h 1h 1 CHB MODA TB MODB 0 1 3h 1h 1 MODA...

Страница 144: ...uipment Have surplus equipment taking up shelf space We ll give it a new home Learn more Visit us at artisantg com for more info on price quotes drivers technical specifications manuals and documentat...

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