DBS9900 User’s Manual
7-12
DBS9900 Clock
82-28993 Revision 01
D[01]
C[2]
Control bit, set to 0
Set to 0
R/W
D[00]
C[1]
Control bit, set to 0
Set to 0
R/W
7.7.1
Clock Control Description
EXTCLKA_EN
is a control output that enables the signal present on the input of Clock A (J4) to
pass through the Channel A threshold comparator to the Clock selector multiplexers. This line is
decoded in Software. See section
Error! Reference source not found.
for truth table.
EXTCLKB_EN
is a control output that enables the signal present on input of Clock B (J10) to
pass through the Channel B threshold comparator to the Clock selector multiplexers. This line is
decoded in Software. See section
Error! Reference source not found.
for truth table.
CHA_CLKSEL[1:0]
are control lines to route No Clock, Time Base Clock, External channel A
Clock or External channel B Clock to daughter board A Clock. These lines are decoded in
hardware. See section
Error! Reference source not found.
for truth table.
Table 14 - CHA_CLKSEL[1:0] Decode
CHA_CLKSEL[1:0] FUNCTION
00
Route No Clock to Module A
(Default)
R/W
01
Route Internal Time Base Clock
to Module A
R/W
10
Route Channel A Clock to
Module A
R/W
11
Route Channel B Clock to
Module A
R/W
CHB_CLKSEL[1:0]
are control lines to route No Clock, Time Base Clock, External channel A
Clock or External channel B Clock to daughter board B Clock. These lines are decoded in
hardware. See section
Error! Reference source not found.
for truth table.
CHB_CLKSEL[1:0]
are decoded in the following way:
Table 15 - CHB_CLKSEL[1:0] Decode
CHB_CLKSEL[1:0] FUNCTION
00
Route No Clock to Module B
(Default)
R/W
01
Route Internal Time Base Clock
to Module B
R/W
10
Route Channel A Clock to
Module B
R/W
11
Route Channel B Clock to
Module B
R/W
7.8 LSDIV Low Speed Divider Register
The
LSDIV
Clock Divider Register
(0x14, Base + 0x18 = 5h)
R/W,
stores the count of the low
frequency 16-bit counter. The address to write to this register is set when the host writes to
0x18
= 5h
. Data is loaded into the register when the host writes to address
0x14
. This counter is
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