DBS9900 User’s Manual
DBS9900 Clock
7-23
82-28993 Revision 01
Table 35 - Threshold DAC Decoding
DAC_WR
DAC_A[1:0]
Latch State
1
XX
Input Data Latched
0
00
Clock A Threshold
0
01
Clock B Threshold
0
10
Trigger A Threshold
0
11
Trigger B Threshold
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