DBS9900 User’s Manual
DBS9900 User’s Manual
ix
82-28993 Revision 01
5.6
Clock .................................................................................................................................................................. 5-36
5.6.1
Set
Clock
Source
an9900_setClockSource
5-37
5.6.2
Get
Clock
Source
an9900_getClockSource
5-38
5.6.3
Set
Internal
Clock
Reference
an9900_setIntClockRef
5-39
5.6.4
Get
Internal
Clock
Reference
an9900_getIntClockRef
5-40
5.6.5
Set
Clock
Threshold
an9900_setClockThreshold
5-41
5.6.6
Get
Clock
Threshold
an9900_getClockThreshold
5-42
5.6.7
Set
Sample
Rate
an9900_setSampleRate
5-43
5.6.8
Get
Sample
Rate
an9900_getSampleRate
5-43
5.6.9
Await
PLL
Lock
an9900_awaitPLLLock
5-44
5.6.10
Clock
Frequency
an9900_clockFreq 5-45
5.6.11
Clock
Frequency
Query
an9900_clockFreq_Q
5-46
5.6.12
Clock
Control
an9900_clockControl
5-47
5.6.13
Clock
Control
Query
an9900_clockControl_Q
5-48
5.6.14
R
Counter
an9900_rCounter
5-49
5.6.15
R
Counter
Query
an9900_rCounter_Q
5-49
5.6.16
N
Counter
an9900_NCounter 5-50
5.6.17
High
Speed
Divider
an9900_highSpeedDivider
5-51
5.6.18
Low
Speed
Divider
an9900_lowSpeedDivider
5-51
5.6.19
Clock
A/B
Threshold
an9900_clockThreshold
5-52
5.6.20
Clock
A/B
Threshold
Query
an9900_clockThreshold_Q
5-53
5.6.21
Trigger
A/B
Threshold
an9900_triggerThreshold
5-54
5.6.22
Trigger
A/B
Threshold
Query
an9900_triggerThreshold_Q
5-55
5.6.23
Function
Latch
an9900_functionLatch
5-56
5.6.24
Time
Base
Control
an9900_timeBaseControl
5-57
5.7
Utility ................................................................................................................................................................. 5-58
5.7.1
Get
Error
Text
an9900_getErrorText
5-58
5.7.2
Mask
Write
to
Instrument
an9900_maskWriteInst
5-59
5.7.3
Write
to
Instrument
an9900_writeInst
5-60
5.7.4
Read
from
Instrument
an9900_readInst
5-61
5.7.5
Reset
an9900_reset
5-62
5.7.6
Error
Message
an9900_errorMessage
5-63
DBS9900 VME / VXI Bus Interface - Registers ................................................................... 6-1
6.1
ID REGISTER 0x00 Read Only Logical Address Register ................................................................................. 6-3
6.2
DEVICE TYPE REGISTER ................................................................................................................................ 6-3
6.3
Control Register ................................................................................................................................................... 6-5
6.4
Status Register...................................................................................................................................................... 6-5
6.5
Memory Offset Register....................................................................................................................................... 6-6
6.6
Memory Attribute Register .................................................................................................................................. 6-7
6.7
Module / Relay Control Register ......................................................................................................................... 6-7
6.8
Trigger Source Control Register .......................................................................................................................... 6-8
6.9
Trigger Mode Control Register ............................................................................................................................ 6-9
6.10
Interrupt Level Select Register........................................................................................................................... 6-10
6.11
Interrupt Vector Select Register......................................................................................................................... 6-10
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