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App-17
IM DL35O-03EN
Appendix
1
2
3
4
5
6
App
Index
4-CH 1 MS/s, 16-Bit Isolation Module
Rate at Which Data Is Written to the Acquisition Memory
Data Update Rate
1 MS/s
Main Channel
Sample Rate Setting (S/s)
100 M
1 M
50 M
1 M
20 M
1 M
10 M
1 M
5 M
1 M
2 M
1 M
1 M
1 M
500 k
500 k
200 k
200 k
100 k
100 k
50 k
50 k
20 k
20 k
10 k
10 k
5 k
5 k
2 k
2 k
1 k
1 k
500
500
200
200
100
100
50
50
20
20
10
10
5
5
GPS Input
Rate at Which Data Is Written to the Acquisition Memory
Data Update Rate
1 S/s
Main Channel
Sample Rate Setting (S/s)
100 M
100 k
50 M
100 k
20 M
100 k
10 M
100 k
5 M
100 k
2 M
100 k
1 M
100 k
500 k
50 k
200 k
20 k
100 k
10 k
50 k
5 k
20 k
2 k
10 k
1 k
5 k
500
2 k
200
1 k
100
500
50
200
20
100
10
50
5
20
2
10
1
5
–
: Some data will not be updated. If this occurs, previous data is displayed consecutively.
Appendix 2 Relationship between the Main Channel Sample Rate, Sub Channel Data Update Rate, and Acquisition Memory Writing Rate