Individual Functions
6-
115
PID Control Block
The following diagram shows the PID control block in the Inverter.
Fig 6.63 PID Control Block
Option Card
Serial Com
Terminal A1
D1-01
D1-02
D1-16
MEMOBUS communications
register 06 H PID target value
Z
-1
b5-03
+
−
+
P
b1-01
0
1
2
3,4
Frequency reference
using multi-step command
PID input volume
(U1-36)
Set PID target value in
multi-function analog input
Set bit 1 of MEMOBUS
register 0FH to 1
b5-01=2,4
b5-01=1,3
Proportional
gain (P)
b5-02
+
−
+
b5-17
Pulse input terminal RP
H6-01=2
Pulse input terminal RP
-1
Select multi-function inputs
PID input characteristics
0
1
PID SFS Cancel
H6-01=1
Output frequency
1
T
b5-05
−
T
1
-1
PID output
gain (b5-10)
Z
-1
Z
-1
Z
-1
Frequency reference
(U1-01)
PID command (U1-38)
Integral (I) time
b5-03
Store integral using
multi-function inputs
I limit
b5-01=1,3
b5-01=2,4
Derivative
time
Integral rset using
multi-function inputs
PID limit
b5-06
PID Limit
PID primary delay
time constant
b5-08
PID offset
adjustment (b5-07)
Select PID output
characteristics selection
(b5-09)
+
+
−
+
+
+
+
−
+
+
+
+
PID output monitor
(U1-37)
b5-01=0
b5-01=3,4
b5-01=1,2
PID ON
PID OFF
Multi-function input PID control cancel
signal is ON. PID is OFF under the
following conditions:
b5-01 = 0
During JDG command input
b5-11=0
b5-11=1
Enable/disable reverse operation
when PI output is negative
Upper limit
Fmax x109%
Lower limit 0
Upper limit
Fmax x109%
Lower limit
-(Fmaxx109%)
+
+
0
+
1
1
Terminal A2 or A3 PID
target value
Terminal A2 or A3 PID
feedback
H3-05 or
H3-09=B
