Kintex UltraScale KCU1500 Acceleration Development Board
38
UG1234 (v2017.1) June 20, 2017
www.xilinx.com
Chapter 5
Implementation
Introduction
Implementing the Xilinx
®
Acceleration KCU1500 4DDR Expanded Partial Reconfiguration
platform in the Vivado
®
Design Suite is straightforward. The platform reference design
includes modular scripts that are used with Vivado from the SDx™ Environments 2017.1
installation to construct the IP integrator block diagram, synthesize and implement the
design, and produce a DSA file for use with the SDAccel Environment.
The individual scripts provided with the reference design are, as follows:
•
create_design.tcl
: Creates a Vivado project, sets the necessary properties and
parameters, imports sources, and constructs the IP Integrator block diagram. The
outcome of this script is a new project with constructed and validated block diagram,
ready to synthesize.
•
run_synth.tcl
: Synthesizes the IP cores of the design, followed by the top level. This
script is to be run after
create_design.tcl
.
•
run_impl.tcl
: Implements the full design, including optimization, placement, and
routing. The script is to be run after
run_synth.tcl
.
•
write_dsa.tcl
: Creates the
.dsa
file for use in the SDAccel Environment from the
implemented design. This script is to be run after
run_impl.tcl
.
•
run.tcl
: Optionally runs all of the above scripts in sequence.
IMPORTANT:
Use the version of Vivado included with your SDx Environments 2017.1 installation. The
standard Vivado 2017.1 release is not supported when building the Xilinx Acceleration KCU1500 4DDR
Expanded Partial Reconfiguration platform.
There are two usage flow options for the scripts:
1. For an automated flow that involves no user interaction, from the Linux command line
invoke the following command:
vivado -source run.tcl
Vivado proceeds through all steps and produces a
.dsa
file after some time.
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