Kintex UltraScale KCU1500 Acceleration Development Board
33
UG1234 (v2017.1) June 20, 2017
www.xilinx.com
Chapter 4:
Software Platform
XDMA, through
dma_pf_demux
(continued)
S_AXI_MGNTPF
AXI4-Lite control
interface for
Management
Physical Function
(continued)
sys_mgmt_wiz
System
Management
Wizard
S_AXI_LITE 0x000A_0000
64K
0x000A_FFFF
feature_rom_
ctrl
AXI BRAM
Controller for
Feature ROM
S_AXI
0x000B_0000
4K
0x000B_0FFF
debug_bridge
_xvc
Debug Bridge
for Xilinx Virtual
Cable
S_AXI
0x000C_0000
64K
0x000C_FFFF
axi_firewall
_ctrl
AXI Firewall to
protect
Management
Physical
Function
control path
S_AXI_CTL 0x000D_0000 64K
0x000D_FFFF
axi_firewall
_ctrl_user
AXI Firewall to
protect User
Physical
Function
control path
S_AXI_CTL 0x000E_0000
64K
0x000E_FFFF
axi_firewall
_data
AXI Firewall to
protect data
path
S_AXI_CTL 0x000F_0000
64K
0x000F_FFFF
xilmonitor_
apm
AXI
Performance
Monitor for
application
profiling
S_AXI
0x0010_0000
64K
0x0010_FFFF
Table 4-1:
Reference Design Address Map
(Cont’d)
Master IP Core AXI Master Interface
Slave IP Core
AXI Slave
Interface
Offset
Address
Range High Address
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