Kintex UltraScale KCU1500 Acceleration Development Board
26
UG1234 (v2017.1) June 20, 2017
www.xilinx.com
Chapter 3:
Hardware Platform
Application Profiling and Other Features
Beyond the fundamentals of host connectivity, memory control, SDAccel System Compiler
support enabled by the Programmable Region, and AXI interconnectivity, the platform
offers other features through a combination of Hardware Platform IP and Software Platform
driver support:
• SDx Environments application profiling support, using the trace offload hardware
infrastructure
• Kintex UltraScale KCU1500 Acceleration development board flash memory
programming using SPI flash IP infrastructure
• Kintex UltraScale KCU1500 Acceleration development board FPGA fan speed control
using memory-mapped I2C controller
• AXI Firewall IP protection of the static base region hardware against potential AXI
protocol violations from kernels
• SDx Feature ROM, to assist the SDAccel Software Platform in interpreting the Hardware
Platform feature set
• Xilinx Virtual Cable usage using the Debug Bridge
• System Management Wizard IP-based device temperature and voltage monitoring
The following figure shows the
apm_sys
sub-hierarchy of the reconfigurable expanded
region.
• The trace offload hardware infrastructure supports SDx Environments application
profiling by monitoring and characterizing AXI transactions.
• The AXI Performance Monitor IP instance uses five AXI memory-mapped monitor
interfaces, driven by the four master interfaces of the Programmable Region (for kernel
monitoring) and the XDMA IP using AXI Register Slice IP for partial reconfiguration
isolation (for host monitoring).
X-Ref Target - Figure 3-14
Figure 3-14:
Trace Offload Hardware Infrastructure in Reconfigurable Expanded Region
apm_sys Sub-Hierarchy
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