Models 707B and 708B Switching Matrix Reference Manual
Section 7: TSP command reference
707B-901-01 Rev. B / January 2015
7-189
Bit
Value
Description
B5
status.standard.COMMAND_ERROR
status.standard.CME
Set bit indicates that a command error has
occurred. Command errors include:
IEEE Std 488.2 syntax error:
Instrument
received a message that does not follow the
defined syntax of the IEEE Std 488.2
standard.
Semantic error:
Instrument received a
command that was misspelled or received an
optional IEEE Std 488.2 command that is not
implemented.
GET error:
The instrument received a Group
Execute Trigger (GET) inside a program
message.
Bit B5 decimal value: 32
B6
status.standard.USER_REQUEST
status.standard.URQ
Set bit indicates that the LOCAL key on the
instrument front panel was pressed.
Bit B6 decimal value: 64
B7
status.standard.POWER_ON
status.standard.PON
Set bit indicates that the instrument has been
turned off and turned back on since the last
time this register has been read.
Bit B7 decimal value: 128
B8-B15
Not used
Not applicable
As an example, to set bit B0 of the standard event status enable register, set
status.standard.enable = status.standard.OPC
.
In addition to the above constants,
standardRegister
can be set to the numeric equivalent of the
bit to set. To set more than one bit of the register, set
standardRegister
to the sum of their
decimal weights. For example, to set bits B0 and B4, set
standardRegister
to 17 (which is the
sum of 1 + 16).
Bit
B7
B6
B5
B4
B3
B2
B1
B0
Binary value
0/1
0/1
0/1
0/1
0/1
0/1
0/1
0/1
Decimal
128
64
32
16
8
4
2
1
Weights
(2
7
)
(2
6
)
(2
5
)
(2
4
)
(2
3
)
(2
2
)
(2
1
)
(2
0
)
Example 1
standardRegister = status.standard.OPC
+ status.standard.EXE
status.standard.enable = standardRegister
Uses constants to set the OPC and EXE
bits of the standard event status enable
register.
Example 2
-- decimal 17 = binary 0001 0001
standardRegister = 17
status.standard.enable = standardRegister
Uses a decimal value to set the OPC and
EXE bits of the standard event status
enable register.
Also see
Event summary bit (ESB register)