97/317
5 - Peripherals
Table 5.
ST72311N I/O configuration
Note: PA0-PA2, PB5-PB7, PD6-PD7 and PE4-PE7 are not available on the ST72311J ver-
sion.
In addition, some pins also serve as inputs for other peripherals, or may be held from their
normal output function and be taken as the output pins of some peripherals if those periph-
erals are specially configured to do so by setting a bit in one of their control registers. As an ex-
ample, the PC2 pin is also used as the capture input of Timer A, and pin PC1 is the output
compare 1 pin of Timer B if the OC1E bit in the TCR2 register of this timer is set. The interac-
tion with the pins and the required precautions are discussed, when needed, in the paragraph
related to the corresponding peripheral.
Input configuration
( DDR = 0)
Output configuration
( DDR = 1)
Port
OR = 0
OR = 1
External interrupt
source,
Polarity option bits
OR = 0
OR = 1
PA0-PA3
Floating
Pull-up with
interrupt
EI0
PEI0-PEI1
Open drain
Push-pull
PA4-PA7
Floating
n/a
True open drain, high sink
capability
PB0-PB3
Floating
Pull-up with
interrupt
EI2
PEI2-PEI3
Open drain
Push-pull
PB4-PB7
Floating
Pull-up with
interrupt
EI3
PEI2-PEI3
Open drain
Push-pull
PC0-PC7
Floating
Pull-up
n/a
Open drain
Push-pull
PD0-PD7
Floating
Pull-up
n/a
Open drain
Push-pull
PE0-PE1
Floating
Pull-up
n/a
Open drain
Push-pull
PE4-PE7
Floating
Reserved
n/a
High sink
capability
reserved
PF0-PF2
Floating
Pull-up with
interrupt
EI1
PEI0-PEI1
Open drain
Push-pull
PF4, PF6,
PF7
Floating
Pull-up
n/a
Open drain
Push-pull