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4 - Architecture of the ST7 core
4.2 ST7 CORE
The ST7 core uses an extended version of an industry-standard instruction set. This set is
both exhaustive (almost all instructions are available, with the exception of division) and fairly
orthogonal (the instructions allow for most addressing modes). This makes the instruction set
of the ST7 both clear and easy to use when programming in assembler.
For those of you already familiar with the standard instruction set, the extension resides
mainly in the following two points:
A second index register,
Y
, that can be used anywhere the
X
register is used (like indexed
addressing), or like
X
, moved to any other register;
The indirect addressing modes, that come in addition to the direct, long, and indexed modes.
The core as described here is limited to the processing unit, excluding the reset and interrupt
circuitry. They will be described in the chapter dealing with the peripherals. The block diagram
of the core and the addressing space is shown below: