Samsung VP-L900, Training Manual

Page: 108 / 173

Circuit Operating Description
Samsung Electronics 6-29
6-5 Verticality Register circuit
The XV1 signal which is output from 68 pins of the ICP06 (S5C7341X01) is input in the ICP01 4 pin.
69 pins of the ICP06 with 68 pin XV1 signals come to be more, they are output 16 pins of the ICP01.
The XV2 signal which is output in 70 pins of the ICP06 is output from the ICP01 17 pin and it is input in 3 pins of
Image Sensor (CCD).
The XV4 signal of 73 pins of the ICP06 is output with the ICP01 13 pin.
The XV3 signal which is output in 73 pins of the ICP06 is input with the ICP01 6 pin.
72 pins XSG2 of the ICP06 and the XV3 come to combine and the signal is output with the ICP01 14 pin.
The V4, the V3, V2, V1 pulse is input with 1,2,3,4, each pins of the ICCO1 (Image Sensor).
XV4
XSG2
XV3
XSG1
XV1
XV2
XSUB
V4
V3
V1
V2
SUB
13 73
72
71
69
68
70
76
80 79 1
8
7
6
5
4
3
2
14
16
17
19
+
1
2
4
3
10
9 12 13
H1 H2 RG
RG H1 H2
ICP06
S5C7341X01
DSP
ICP01
KS7221D
CCD DRIVE
ICC01
CCD IMAGE
SENSOR
SUB DC
BIAS
Fig. 6-25 electronic shutter and Verticality Register circuit