Hardware Manual for the PCD3 Series│Document 26/789; Version E 5│31.01.2005
Saia-Burgess
Controls Ltd.
PCD3 CPUs
PCD3.Mxxx0 Classic CPUs and expansion housings
3-5
3
3.4
PCD3 CPUs
Differentiation of PCD3 base
units
M3020
M3230
M3330
M5440
M5540
I/O bus connection for expansion
units
no
Yes
Number of inputs/outputs or I/O
module sockets
64
1)
4
1023
1) 2)
64
Processor (Motorola)
CF 5272
Processing time
Bit instruction
Word instruction
0.3...1.5 µs
3)
0.9 µs
3)
Firmware, firmware update
(firmware memory soldered on)
Downloadable from the PG5 environment
Minimum PG5 version
1.3.100
Working memory
128 kB
256 kB
512 kB
Backup memory
128 kB
onboard
flash
256 kB
onboard flash
256 kB
onboard flash
1 MByte flash card
(optional)
Clock (RTC)
yes, deviation < 1 min./month
Data protection
8 hours with Super Cap
(after 5 min. loading)
CR 2032 lithium
battery
1-3 years
4)
Interrupt inputs
Maximum input frequency
2
1 kHz
5)
1) Using digital I/O modules PCD3.E16x or A46x with 16 I/Os each
2) On all PCD3 units, address 255 is reserved for the watchdog. The I/Os reserved for the watchdog cannot be used,
and no analogue and H modules can be used on the sockets with base address 240
3) Typical values; the processing time is dependent on the load on the communication ports
4) The period given is a buffer time; it is dependent on the ambient temperature (a higher temperature means a
shorter buffer time)
5) The 1kHz applies with a pulse/pause ratio of 1:1 and refers to the total frequencies of the two inputs
