Command Reference
R&S
®
CMW-KM750/-KM751
100
User Manual 1173.9670.02 ─ 05
<PvTXRelFLimit>
Start of area 3
Range:
0 chips to 20 chips
*RST:
12 chips
Default unit: chips
<PvTXRelHLimit>
End of area 3
Range:
35 chips to 60 chips
*RST:
45 chips
Default unit: chips
Example:
See
Firmware/Software:
V1.0.4.11
CONFigure:TDSCdma:MEAS<i>:MEValuation:LIMit:PVTime:EAReas
<PvTEnbAB>, <PvTEnbCE>, <PvTEnbFH>
Activates or deactivates the limit check for the individual areas of the power template,
see
chapter 3.5.2, "Power Templates"
Parameters:
<PvTEnbAB>
OFF | ON
Area 1
*RST:
ON
<PvTEnbCE>
OFF | ON
Area 2
*RST:
ON
<PvTEnbFH>
OFF | ON
Area 3
*RST:
ON
Example:
See
Firmware/Software:
V1.0.5.3
Manual operation:
See
6.3.8 Limits (Spectrum ACLR)
The following commands define limits for the Adjacent Channel Leakage Power Ratio
(ACLR).
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CONFigure:TDSCdma:MEAS<i>:MEValuation:LIMit:ACLR:OBW
<ACLROBWLimit>
Defines the upper limit for the ACLR occupied bandwidth.
Multi Evaluation Measurement Commands