Rockwell Automation 2080-L50E-24AWB, User Manual, Page: 213 / 390

Rockwell Automation Publication 2080-UM002N-EN-E - November 2022 213
Chapter 10 Use the High-Speed Counter and Programmable Limit Switch
This bit is updated continuously by the HSC sub-system whenever the controller is in an
executing mode. Writing to this element is not recommended.
The Low Preset Reached status flag is set (1) by the HSC sub-system whenever the
accumulated value (HSCSTS.Accumulator is less than or equal to the low preset variable
HSCAPP.LPSetting).
This bit is updated continuously by the HSC sub-system whenever the controller is in an
executing mode. Writing to this element is not recommended.
The Overflow Interrupt status bit is set (1) when the HSC accumulator counts through the
overflow value and the HSC interrupt is triggered. This bit can be used in the control program
to identify that the overflow variable caused the HSC interrupt. If the control program needs to
perform any specific control action based on the overflow, this bit is used as conditional logic.
This bit can be cleared (0) by the control program and is also cleared by the HSC sub-system
whenever these conditions are detected:
• Low Preset Interrupt executes
• High Preset Interrupt executes
• Underflow Interrupt executes
The Underflow Interrupt status bit is set (1) when the HSC accumulator counts through the
underflow value and the HSC interrupt is triggered. This bit can be used in the control program
to identify that the underflow condition caused the HSC interrupt. If the control program needs
to perform any specific control action based on the underflow, this bit is used as conditional
logic.
This bit can be cleared (0) by the control program and is also cleared by the HSC sub-system
whenever these conditions are detected:
• Low Preset Interrupt occurs
• High Preset Interrupt occurs
• Overflow Interrupt occurs
The High Preset Interrupt status bit is set (1) when the HSC accumulator reaches the high
preset value and the HSC interrupt is triggered. This bit can be used in the control program to
identify that the high preset condition caused the HSC interrupt. If the control program needs
to perform any specific control action based on the high preset, this bit is used as conditional
logic.
Low Preset Reached (HSCSTS.LPReached)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (HSCAPP.HSCMode) on page 204 .
User Program Access
HSCSTS.LPReached) bit 2…9 read only
Overflow Interrupt (HSCSTS.OFCauseInter)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (HSCAPP.HSCMode) on page 204 .
User Program Access
HSCSTS.OFCauseInter bit 0…9 read/write
Underflow Interrupt (HSCSTS.UFCauseInter)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (HSCAPP.HSCMode) on page 204 .
User Program Access
HSCSTS.UFCauseInter bit 2…9 read/write
High Preset Interrupt (HSCSTS.HPCauseInter)
Description Data Format
HSC Modes
(1)
(1) For Mode descriptions, see HSC Mode (HSCAPP.HSCMode) on page 204 .
User Program Access
HSCSTS.HPCauseInter bit 0…9 read/write