Rev. 1.50, 10/04, page 124 of 448
7.2.3
Translation Table Base Register (TTB)
TTB is used to store the base address of the currently used page table, and so on. The contents of
TTB are not changed unless a software directive is issued. This register can be used freely by
software.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Bit:
Initial value:
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TTB
TTB
R/W
R/W
R/W
R/W
R/W
R/W:
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
7.2.4
TLB Exception Address Register (TEA)
After an MMU exception or address error exception occurs, the virtual address at which the
exception occurred is stored. The contents of this register can be changed by software.
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Bit:
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Initial value:
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
TC
SA2
SA1
SA0
R
R/W
R/W
R/W
R/W
R/W:
Bit:
Initial value:
R/W:
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
0
0
0
0
R
R
R
R
R
R
R
R
Summary of Contents for SuperH SH-4A
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Page 231: ...Rev 1 50 10 04 page 211 of 448 Possible Exceptions Slot illegal instruction exception ...
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Page 408: ...Rev 1 50 10 04 page 388 of 448 Possible Exceptions Inexact Not generated when FPSCR PR 1 ...
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