Renesas IDT Tsi574, User Manual

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10. Clocks, Resets and Power-up Options > Resets 209
Tsi574 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
10.2.2 Per-Port Reset
In order to reset an individual RapidIO port it must be powered down and back up again using the
following procedure:
1. Power down the port using the procedure in “Port Power Down” .
2. Wait 50 microseconds to guarantee that all packets are flushed.
3. Power the port back up.
4. Reconfigure the registers that were impacted by the power down (see “Default Configurations on
Power Down” ).
10.2.3 Generating a RapidIO Reset Request to a Peer Device
The following steps can be used by software to reset a peer device:
1. Determine which RapidIO port is connected to the peer to be reset.
2. Alter the LUT contents to ensure that no packets are being routed to the link partner that is to be
reset.
3. Lockout the port using the PORT_LOCKOUT field in the “RapidIO Serial Port x Control CSR” on
page 273 . This ensures that any traffic received from the peer device is dropped, and any traffic
still in flight to the peer device is dropped.
4. Use the “RapidIO Serial Port x Link Maintenance Request CSR” on page 265 to transmit four reset
control symbols in a row.
5. Write 0 to the OUTBOUND field of the “RapidIO Serial Port x Local ackID Status CSR” on
page 268 .
10.2.4 JTAG Reset
The JTAG TAP controller’s reset is independent of the Tsi574 functional resets. For boundary scan
operation, the TAP controller can be reset with either the external pin TRST_b or by holding the pin
TMS asserted for more than five TCK cycles.
SW_RST_b is the only method to determine that a reset request has been received and should
be handled as an interrupt. Port-writes cannot be sent for notification of reset request
reception.
After a port has been reset (powered down and back up), the following is applicable:
• The port’s configuration registers revert to their default values.
• The port’s SerDes related registers and LUTs must be re-configured.
• The port’s register values are not loaded from I2C on a port reset.
The SOFT_RST_X1 and SOFT_RST_X4 bits in the “SRIO MAC x Digital Loopback and
Clock Selection Register” only reset the MAC – they do not reset the SerDes.