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Tsi574 User Manual
June 6, 2016
Integrated Device Technology
www.idt.com
10.
Clocks, Resets and Power-up Options
This chapter describes the clock and reset of the Tsi574. It includes the following information:
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“Power-up Options” on page 210
10.1
Clocks
The Tsi574 has three input clocks (S_CLK_p/n, P_CLK and I2C_SCLK) that are used to produce the
Tsi574’s internal clock domains.
In addition to these reference clocks, each RapidIO ingress port contains independent receive clock
domains, one for each lane. The receive clock is extracted from the 8B/10B encoding on each lane.
