National Instruments AT-MIO-64F-5, User Manual

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Chapter 3 Theory of Operation
© National Instruments Corporation 3-19 AT-MIO-64F-5 User Manual
In the pulsed waveform application, Counter 1 of the Am9513A is programmed to count the
number of retransmit signals, before terminating the sequence. At this point, Counter 2 serves as
an interval timer–waiting a programmed amount of time and then restarting the sequence. This
process proceeds ad infinitum until the timer trigger is removed or disabled, or the
CYCLICSTOP bit is set.
Digital I/O Circuitry
The AT-MIO-64F-5 has eight digital I/O lines. These eight digital I/O lines are divided into two
ports of four lines each and are located at pins ADIO<3..0> and BDIO<3..0> on the I/O
connector. Figure 3-16 shows a block diagram of the digital I/O circuitry.
I/O Connector
A
Digital
Input
Register
B
DOUT0
Digital
Output
Register
DOUT1
Digital
Output
Register
EXT STROBE WR*
EXTSTROBE*
/
4
/
4
/
4
/
4
DO REG WR
DOUT0 ENABLE
/
4
DATA <3..0>
DATA <7..4>
/
4
DOUT1 ENABLE
DIREG RD
DATA <7..0>
/
8
BDIO <3..0>
ADIO <3..0>
PC I/O Channel
Figure 3-16. Digital I/O Circuitry Block Diagram
The digital I/O lines are controlled by the Digital Output Register and monitored by the Digital
Input Register. The Digital Output Register is an 8-bit register that contains the digital output
values for both ports 0 and 1. When port 0 is enabled, bits <3..0> in the Digital Output Register
are driven onto digital output lines ADIO<3..0>. When port 1 is enabled, bits <7..4> in the
Digital Output Register are driven onto digital output lines BDIO<3..0>.