National Instruments AT-MIO-64F-5, User Manual

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Chapter 3 Theory of Operation
© National Instruments Corporation 3-13 AT-MIO-64F-5 User Manual
I/O Connector
REF Selection
EXTREF
DAC1
DAC0WR
DAC0 OUT
AO GND
DAC1 OUT
DAC0
DAC1WR
PC I/O Channel
REF Selection
REF
REF
From
Offset
DAC0
From
Offset
DAC1
From Gain DAC1
From Gain DAC0
+10 V INT REF
DATA
16
Figure 3-9. Analog Output Circuitry Block Diagram
Analog Output Circuitry
Each analog output channel contains a 12-bit DAC, reference selection switches,
unipolar/bipolar output selection switches, and output data coding circuitry.
The DAC in each analog output channel generates a voltage proportional to the input voltage
reference (V
ref
) multiplied by the digital code loaded into the DAC. Each DAC can be loaded
with a 12-bit digital code by writing to registers on the AT-MIO-64F-5 board. The output
voltage is available on the AT-MIO-64F-5 I/O connector DAC0 OUT and DAC1 OUT pins.
The analog output of the DACs is updated to reflect the loaded 12-bit digital code in one of the
following three ways:
¥ Immediately when the 12-bit code is written to the DACs (in immediate update mode)
¥ When an active low pulse is detected on the TMRTRIG* signal (in posted update mode)
¥ When the Update Register is strobed (in posted update mode)