National Instruments AT-MIO-64F-5, User Manual

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Programming Chapter 5
AT-MIO-64F-5 User Manual 5-10 © National Instruments Corporation
Setting the SCN2 bit in Command Register 1 enables the use of a scan interval during multiple
A/D conversions. The scan-interval counter gives each cycle through the scan sequence a time
interval. The scan-interval counter begins counting at the start of the scan sequence programmed
into the channel configuration memory. When the scan sequence terminates, the next cycle
through the scan sequence does not begin until the scan-interval counter has reached its terminal
count. Be sure that the scan-interval counter allows enough time for all conversions in a scan
sequence to occur so that conversions are not missed.
Data Acquisition Programming Functions
This section provides a detailed explanation of the functions necessary to program the analog
input for single and multiple channel A/D conversions.
Clearing the Analog Input Circuitry
The analog input circuitry can be cleared by strobing the DAQ Clear Register. This operation
leaves the analog input circuitry in the following state:
¥ Analog input error flags OVERFLOW and OVERRUN are cleared.
¥ Pending data acquisition interrupt requests are cleared.
¥ ADC FIFO is emptied.
¥ DAQCOMP flag in the Status Register is cleared.
Empty the ADC FIFO before starting any A/D conversions. This action guarantees that the A/D
conversion results read from the FIFO are the results from the initiated conversions and are not
left over results from previous conversions.
Programming Single Analog Input Channel Configurations
The analog input channel, gain, mode, and range for single conversion and single channel
acquisition are selected by writing a single configuration value to the CONFIGMEM Register.
This register offers a window into the channel configuration memory. The CONFIGMEMLD
Register must then be strobed to load this channel configuration information. See the
CONFIGMEM Register bit description in Chapter 4,
Register Map and Descriptions , for analog
input channel and configuration bit patterns. Set up the bits as given in the CONFIGMEM
Register bit description and write to the CONFIGMEM Register. Remember that the channel
configuration memory must be first initialized with an access to the CONFIGMEMCLR
Register.
After the channel configuration memory is configured, it needs to be written to only when the
analog input channel or configuration settings need to be changed.