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F6 : Load BIOS Defaults
F7 : Load Setup Defaults
This section a llows you to configure the system ba sed on the specific fea tures of
the insta lled chipset. This chipset ma na ges bus speeds a nd a ccess to system
memory resources, such a s DRAM a nd the externa l ca che. It a lso coordina tes
communica tions between the conventiona l ISA bus a nd the PCI bus. It must be
sta ted tha t these items should never need to be a ltered. The defa ult settings ha ve
been chosen beca use they provide the best opera ting conditions for your system.
The only time you might consider ma king a ny cha nges would be if you
discovered tha t da ta wa s being lost while using your system.
DRAM Settings
The first chipset settings dea l with CPU a ccess to dyna mic ra ndom a ccess
memory (DRAM). The defa ult timings ha ve been ca refully chosen a nd should
only be a ltered if da ta is being lost. Such a scena rio might well occur if your
system ha d mixed speed DRAM chips insta lled so tha t grea ter dela ys ma y be
required to preserve the integrity of the da ta held in the slower memory chips.
Pre-defined va lues for DRAM, ca che.. timing
a ccording to CPU type & system clock.
The Choice: Ena bled, Disa bled.
Note: When this item is ena bled, the pre-defined items will become SHOW-
ONLY.
The DRAM timing is controlled by the DRAM Timing Registers. The timings
progra mmed into this register a re dependent on the system design. Slower ra tes
ma y be required in certa in system designs to support loose la youts or slower
memory.
60ns
DRAM Timing Type.
70ns
DRAM Timing Type.
Auto Configuration
DRAM Timing
DRAM RAS#
Precharge Time