Intel 810A3, Design Manual

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Intel
®
810A3 Chipset Design Guide 2-11
PGA370 Processor Design Guidelines
2.2.7 Connecting RESET# and RESET2# on a Flexible PGA370
Design
Intel

810A3 chipset platform designs that support both the Intel

Celeron™ processor and
Pentium

III
processor mut route the AGTL+ reset signal from the chipset to two pins on the
processor, as well as to the ITP connector. This reset segnal is conneted to pins AH4 (RESET#)
and X4 (RESET#) at the PGA370 socket (see
Figure 2-5 ).
On legacy Intel

810A3 chipset platforms (ones that only have support for Intel

Celeron™
processors), RESET# is delivered only to pin X4. On Flexible Intel

810A3 Chipset platforms
(ones that have support for both Intel

Celeron™ processor and the Intel

Penitum

II processors)
using a 370-pin socket, RESET# is delivered to both pins X4 and AH4.
2.2.8 Reset Strapping Options
LMD26 on the GMCH is used as a strap at reset to determine whether the system board is
supporting a 370-pin socket or an SC242 connector:
LMD26: 0 or floating = 370-pin socket [leave as no connect]
1 = SC242 connector [pullup to 3.3V through an (approximately) 8.2K
Ω
pullup resistor]
It is recommended that this circuit be added to new motherboard designs using either the SC242
connector or the PGA370 socket. The resistor location can be left unpopulated for the PGA370
socket. This allows flexibility for processor timing parameters.
Figure 2-5. RESET# Schematic for PGA370 Designs
V
T T
91
Ω
cs_rtt_stub
91
Ω
V
T T
22
Ω
1 0 p F
P r o c e s s o r
P i n A H 4
Pin X4
D a i s y C h a i n
I T P
cpu_rtt_stub
l e n C P U
2 4 0
Ω
l e n C S
lenITP
C h i p s e t
Parameter
l e n C S
lenITP
l e n C P U
cs_rtt_stub
C P U _ r t t _ s t u b
Minimum
0.5
1
0.5
0.5
0.5
Maximum
1.5
3
1.5
1.5
1.5