Intel
®
810A3 Chipset Design Guide
3-1
SC242 Processor Design Guidelines
SC242 Processor Design Guidelines
3
This chapter provides SC242 processor design guidelines including Layout Guidelines, general
topology, minimizing crosstalk, motherboard layout rules for non-AGTL+ signals, THRMDP and
THRMDN, and motherboard frequency select for SC242 designs. The layout guidelines are
processor-specific and should be used in conjunction with the
Chapter 4, “Layout and Routing
Guidelines”
. See
Chapter 5, “Advanced System Bus Design”
for more details on AGTL+ layout
guidelines.
3.1
Intel
®
Pentium
®
III Processors Layout Guidelines
The following layout guide supports designs using Intel
Pentium
®
III
processors utilizing the
SC242 connector and Intel
810A3 chipset at system bus speeds of 100 MHz.
Initial Timing Analysis
Table 3-1
lists the AGTL+ component timings of the processors and GMCH defined at the pins.
These timings are for reference only; obtain each processor’s specifications from its
respective Electrical, Mechanical, and Thermal Specification and appropriate Intel
810A3
chipset component specification.
NOTES:
1. All times in nanoseconds.
2. Numbers in table are for reference only. These timing parameters are subject to change. Please check the
appropriate component documentation for valid timing parameter values.
3. T
SU_MIN
= 2.72 ns assumes the GMCH sees a minimum edge rate equal to 0.3 V/ns.
Table 3-2
gives an example AGTL+ initial maximum flight time and
Table 3-3
is an example
minimum flight time calculation for a 100 MHz, uni-processor system using Intel
Pentium
III
processor/Intel
®
810A3 Chipset system bus. Note that assumed values for clock skew and clock
jitter were used. Clock skew and clock jitter values are dependent on the clock components
and distribution method chosen for a particular design and must be budgeted into the initial
timing equations as appropriate for each design.
Table 3-1. Intel
®
Pentium
®
III Processor and GMCH AGTL+ Parameters for Example
Calculations
1
IC Parameters
Intel
®
Pentium III processor
core at 100 MHz System Bus
GMCH
Notes
Clock to Output maximum (T
CO_MAX
)
2.70
3.63
2
Clock to Output minimum (T
CO_MIN
)
-0.10
0.50
2
Setup time (T
SU_MIN
)
1.20
2.27
2,3
Hold time (T
HOLD
)
0.80
0.28
Summary of Contents for 810A3
Page 1: ...Intel 810A3 Chipset Platform Design Guide July 2000 Order Number 298186 002...
Page 11: ...1 Introduction...
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Page 25: ...2 PGA370 Processor Design Guidelines...
Page 26: ...This page is intentionally left blank...
Page 41: ...3 SC242 Processor Design Guidelines...
Page 42: ...This page is intentionally left blank...
Page 51: ...4 Layout and Routing Guidelines...
Page 52: ...This page is intentionally left blank...
Page 93: ...5 Advanced System Bus...
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Page 115: ...6 Clocking...
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Page 123: ...7 System Design Considerations...
Page 124: ...This page is intentionally left blank...
Page 137: ...8 Design Checklist...
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Page 157: ...9 Third Party...
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Page 163: ...A PCI Devices Functions Registers Interrupts...