Intel 810A3, Design Manual

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Intel
®
810A3 Chipset Design Guide 8-7
Design Checklist
PICCLK I
Connect to clock generator / 22-33
Ω
series resistor (though OEM needs to
simulate based on driver characteristics).
SLOTOCC# O
Tie to ground, leave it No Connect, or could be connected to PWRGOOD logic to
gate system from powering on if no processor is present. If used, 1 K
Ω
–10 K
Ω
pullup resistor to any voltage.
TESTHI I
1 K
Ω
–100 K
Ω
pullup resistor to VCC_2.5. If a legacy design pulls this up to
VCC
CORE
, use a 1 K
Ω
–10 K
Ω
pullup resistor.
THERMDN O
No Connect if not used; otherwise connect to thermal sensor using vendor
guidelines.
THERMDP I
No Connect if not used; otherwise connect to thermal sensor using vendor
guidelines.
VCC_CORE I Connect to core voltage regulator. Provide low frequency decoupling.
VID[4:0] O
Connect to on-board VR or VRM. For on-board VR, 10 K
Ω
pullup resistor to
power-solution compatible voltage required (usually pulled up to input voltage of
the VR). Some of these solutions have internal pullups. Optional override
(jumpers, ASIC, etc.) could be used. May also connect to system monitoring
device.
Vtt I Connect to 1.5V regulator. Provide high and low frequency decoupling.
NO CONNECTS N/A
The following pins must be left as no-connects: A16, A47, A88, A113, A116,
B12, B20, B76, B112.
Table 8-9. Special Consideration Checklist
Checklist Line Items Comments
GND (VSS) Connect AJ3, AL1, and AN3 to ground (Vss). These pins must be grounded.
Table 8-10. Clock Generator Checklist
Checklist Line Items Comments
CPU Series resistor 33
Ω
± 5%.
SDRAM/DCLK
Series resistor 22
Ω
± 5%.
DCLK cap: 22 pF ± 2%.
3V66
Series resistor 22
Ω
± 5%.
cap: 18pF ± 2%.
PCI Series resistor 33
Ω
± 5%.
TCLK Series resistor 22
Ω
± 5%.
OCLK/RCLK Series resistor 33
Ω
± 5%.
48MHz Series resistor 33
Ω
± 5%.
APIC Series resistor 33
Ω
± 5%.
REF Series resistor 10
Ω
± 5%.
Table 8-8. Miscellaneous Checklist for SC242 Processors (Continued)
CPU Pin I/O Comments