Intel 810A3, Design Manual

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Intel
®
810A3 Chipset Design Guide 4-21
Layout and Routing Guidelines
4.9.3 Motherboard Implementation
The following design considerations are provided for the implementation of an ICH platform using
AC’97. These design guidelines have been developed to ensure maximum flexibility for board
designers while reducing the risk of board related issues. These recommendations do not represent
the only implementation or a complete checklist, but provides recommendations based on the ICH
platform.
•
Codec Implementation
— The motherboard can implement any valid combination of codecs on the motherboard and
on the riser. For ease of homologation, it is recommended that a modem codec be
implemented on the AMR module; however, nothing precludes a modem codec on the
motherboard.
— Only one primary codec can be present on the link. A maximum of two present codecs can
be supported in an ICH platform.
— If the motherboard implements an active primary codec on the motherboard and provides
an AMR connector, it must tie PRI_DN# to ground.
— The PRI_DN# pin is provided to indicate a primary codec is present on the motherboard.
Therefore, the AMR module and/or codec must provide a means to prevent contention
when this signal is asserted by the motherboard, without software intervention.
— Components such as FET switches, buffers, or logic states should not be implemented on
the AC-link signals, except for AC_RST#. Doing this will potentially interfere with
timing margins and signal integrity.
— If the motherboard requires that an AMR module override a primary codec down, a means
of preventing contention on the AC-link must be provided for the onboard codec.
— The ICH supports Wake On Ring from S1-S4 states via the AC’97 link. The codec asserts
SDATAIN to wake the system. To provide wake capability and/or caller ID, standby
power must be provided to the modem codec. If no codec is attached to the link, internal
pulldowns prevent the inputs from floating; therefore, external resistors are not required.
The ICH does not wake from the S5 state via the AC’97 link.
— The SDATAIN[0:1] pins should not be left in a floating state if the pins are not connected
and the AC-link is active—they should be pulled to ground through a weak
(approximately 10 K
Ω
) pull-down resistor. If the AC-link is disabled (by setting the shut-
off bit to 1), then the ICH’s internal pull-down resistors are enabled, and thus there is no
need for external pull-down resistors. However, if the AC-link is to be active, then there
should be pull-down resistors on any SDATAIN signal that has the potential of not being
connected to a codec. For example, if a dedicated audio codec is on the motherboard, and
cannot be disabled via a hardware jumper or stuffing option, then its SDATAIN signal
does not need a pull-down resistor. If, however, the SDATAIN signal has no codec
connected, or is connected to an AMR slot, or is connected to an onboard codec that can
be hardware disabled, then the signal should have an external pull-down resistor to
ground.
— In a lightly loaded system (e.g., single codec down), AC'97 signal integrity analysis
should be evaluated to confirm that the signal quality on the link is acceptable by the
codec used in the design. A series resistor at the driver and/or a capacitor at the codec can
be implemented to compensate for any signal integrity issues. The values used are design
dependent and should be verified for correct timings. The ICH AC-link output buffers are
designed to meet the AC'97 2.1 specification with the specified load of 5.