Intel 810A3, Design Manual

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System Design Considerations
7-8 Intel
®
810A3 Chipset Design Guide
7.2.4 Ground Flood Planes
To further decouple the 82810A3 GMCH and provide a solid current return path for the system
memory interface signals, it is recommended that 4-layer boards (signal-power-ground-signal) be
designed with a topside (device side) ground flood plane under the GMCH. This topside copper
flood plane under the center of the GMCH creates a parallel plate capacitor between the power
layer and GND. This topside ground flood plane reduces the inductive trace/via path to the ground
layer by acting as a ground itself. The top-side ground flood plane adds board plane decoupling to
the power layer (1.8V and 3.3V) directly underneath it. This added board plane decoupling is
significant – typically 25 pF/sq.inch without the ground flood plane vs. 225 pF/sq.inch with the
ground flood plane. The added board plane decoupling has a much wider frequency spectrum
(100 MHz – 1 GHz+) with a sustained low series resistance in that range compared to power plane
decoupling capacitors alone (See
Section 7.2.3 ). Tying the pads of these power plane decoupling
capacitors to the ground flood plane reduces trace inductance into these capacitors and provides
improved decoupling.
7.3 Thermal Design Power
Thermal Design power (TDP) is defined as the estimated maximum possible expected power
generated in a component by a realistic application. It is based on extrapolations in both hardware
and software technology over the life of the product. It does not represent the expected power
generated by a power virus.
The TDP of the GMCH component is 4.0 W.
Figure 7-2. 82810A3 GMCH Power Plane Decoupling